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From: Eirik Seljelid
X-Mailer: Mozilla 4.79 (Macintosh; U; PPC)
Subject: Re: MACH M4A3 and Altera Max3064 usage?
Date: Wed, 11 Sep 2002 20:44:15 GMT
NNTP-Posting-Date: Wed, 11 Sep 2002 22:44:15 MET DST
Organization: Tele2 Norway AS Public Access
> "Eirik Seljelid" wrote in message
> > markp wrote:
> > > "Jocke Sjöblom" wrote in message
> > > news:email@example.com...
> > > > Hello! I would really like to know how to use the MACH M4A3 or Altera
> > > > Max3064 chips, and preferable the latter one, in an embedded design.
> > > > It's main task would be to LATCH an 8bit adress and then COMPARE this
> > > > 8bit address with another 8bit port. Any example files which I could
> > > > use for learning how to achieve this would be greatly apprieciated.
> > > > Answers would preferably go through email, where a more personal
> > > > conversation could be held. Many thanks in advance. Regards, Jocke
> > > > 'Zerohero' Sjöblom
> > >
> > > I'd recommend the M4A3 as I'm very familiar with it and they're really
> > > to use, flexible and you can get 100% utilization out of them. Lattice
> > > ispDesignEXPERT is ABEL based, free and quite straight forward
> > > www.latticesemi.com
> > >
> > > Mark.
> > How is it compared to Alteras MAX+PLUS?
> Well I haven't used Max+Plus for a long time (> 4 years!) so it may be
> different now. In those days they used a variant of VHDL which was not
> particularly good at defining right down to the macrocell level. Lattice use
> ABEL which IMO is better suited to CPLDs as it's much easier to fiddle with
> the macrocells. The devices have also come on a lot since then. Can't really
> give you a valid comparison I'm afraid!
Ok. I´ve only used MAX+PLUS for a short time (about 8 months) and I haven´t
learned VHDL yet, so the circuits I've made have been build by using all kinds
of "virtual components" (mega/macrofunctions) as building blocks in the
MAX+PLUS graphic editor. It also uses IEEE Std VHDL, Alteras AHDL and Verilog
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