From: Jim Thompson
Subject: Re: LT SwitcherCAD Current Source Help
References: <3D809F7A.email@example.com> <3D80B305.firstname.lastname@example.org> <email@example.com>
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Date: Fri, 13 Sep 2002 01:25:30 GMT
On Thu, 12 Sep 2002 18:06:31 -0700,
In Newsgroup: sci.electronics.design,
Entitled: "Re: LT SwitcherCAD Current Source Help",
Wrote the following:
|On Thu, 12 Sep 2002 11:30:13 -0400, David Huhn
|>I am not modeling the FET itself, but the IC driver chip.
|>Perhaps I should have been more clear in my inital posting, however, one
|>parameter in my model is the propagation delay from my IC input to the
|>change in IC output voltage.
|>I was hoping to find some method of incorporating that known delay into
|>my circuit model.
|>Thank you for the suggestions, I will continue working on it.
|>David M. Huhn
|For delay you can use an ideal transmission line.
But that will force a time step defined by the T-line, lengthening the
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