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From: "Tom Faloon"
Subject: Re: Voltage level translation
Date: Mon, 23 Sep 2002 00:35:39 +0100
NNTP-Posting-Date: Sun, 22 Sep 2002 23:33:58 +0000 (UTC)
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I would consider a resistive approach before getting into solid state level
Here are a two possibilities, but they are generalities, and their
suitability depends on the devices you are using.
Do check that they provide levels which are compatible with input thresholds
for the actual devices used.
All of the following assume short tracks (i.e. They are not behaving as
1 Open collector driver.
If your CPLD output can be configured in open collector/drain mode, then
just connect it to the desired output, and tie a pullup resistor to the V+
of the driven circuit.
This should be OK for all supplies up to 3V3.
If the driven input has a 5V volt supply, then
ensure your CPLD output is 5V tolerant
tie the pullup to 3V3 instead. (This will almost certainly achieve a
good logic level into the 5V device.)
If speed is important, then the pullup resistor should be as low a value as
possible, (as determined by the current sink capability of the driver.) Rise
time will depend on the resistor value, and load + track capacitance. (e.g
200 Ohm / 50pF will give a rise time around 10nS.)
2 Use a voltage divider.
If the CPLD cannot be configured as an open collector, then use a two
resistor divider to get the signal down to a value just under rail voltages.
Rise time will be determined by track capacitance and the parallel value of
the resistors, so this might improve rise time. (Compered to method 1)
For the case of driving a 5V input, just connect it direct. The output of
most 3V3 devices are sufficient to guarantee a good high input to 5V logic
(Input threshold is usually around 2.0 to 2.4 V)
3 Using diode protection circuits.
You may also think about relying on input protection diodes to clamp the
level, and fitting a single series resistor to limit the current to a safe
level. (But this depends on the logic families used. Not all have clamp
diodes, and it is not always easy to get information on diode current capabi
lities, so this is not my hottest option.)
Hope some of it helps.
william gordon wrote in message news:3D8C8FA4.firstname.lastname@example.org...
> Hi all,
> I want to take the output of a 3.3v cpld and have it drive various
> target devices that may be 1/1.8/2.5/3.3/5 volts. Can someone
> provide me with a Simple circuit (e.g., 1 transistor + resistors)
> that will do this. I've heard a common-base transistor configuration,
> with some modifications will accomplish this. Also the delay should
> be no more than 10 ns throught the translator.
> All help is greatly appreciated.
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