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From: Keith R. Williams
Subject: Re: ISA IRQ signal active how long?
Date: Fri, 4 Oct 2002 10:12:24 -0400
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In article <firstname.lastname@example.org>, mhsprang@NOcustomSPAMware.nl
> "Ru-Chin Tsai" wrote in message
> > I design a ISA card with IRQ support. We know 8259's IRQ signal is
> > active high. I have read many posts about ISA IRQ pin and remain
> > feeling some confusions. Please help me solve these problems.
> > 1. The ISA IRQ will be totem-pole or open-collector or tr-state output
> > type.
> > It seem to have no standard about this issue. Many answers were
> > posted on
> > newsgroup and I can't identify which one is correct output
> > configuration?
> You can use a normal totem-pole output.
Not a good idea! You'll likely have dueling drivers. The correct way
to drive ISA IRQs is open-collector or tristate (essentially OC).
> > 2. When ISA card request interrupt. It must assert the IRQ signal. But
> > how long
> > does IRQ signal be asserted(active high)?
> Until you service the interrupt. I have done it like this:
> An interrupt is requested by setting a flip-flop (FF). The FF output is
> connected to the ISA INTx signal. This FF is reset when the hardware is
> accessed, by combining the output of the address selection logic and (IORD
> or IOWR). So whenever my hardware is read from or written to, is clears the
> INT signal.
A better solution is to leave the interrupt until the interrupting
device no longer requires service.
> > 3. Should I care the 8259 PIC act as edge-trigger or level-sensitive
> > mode?
> Level mode. That's standard in PC world.
No it is not! The ISA bus is edge triggered. ...A real PITA, but
never the less... PCI is negative level sensitive (a far better idea).
This is why ISA interrupts cannot be shared, but PCI can.
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