From: Keith R. Williams
Subject: Re: ISA IRQ signal active how long?
Date: Sun, 6 Oct 2002 22:33:52 -0400
X-Newsreader: MicroPlanet Gravity v2.60
In article ,
> "Keith R. Williams" wrote in message
> > In article ,
> > firstname.lastname@example.org says...
> > > Howdy!
> > > PC standard is edge-triggered, not level-sensitive, for ISA
> > > IIRC. This (and the active-high) I've ranted about since, oh, about
> > I ranted about this before '81. I couldn't believe the PC
> > designers made such a *stupid* mistake. Indeed this isn't the
> > only transgression. The designers had no idea how to design with
> > TTL.
> Eh. The PC wasn't introduced until 1981. Late 1981, for that
August is "late" in the year?
> And that was with a (for IBM!) very short lead time - 6 months,
Eh. The PIC was in use way before the PC, in the same stupid way.
Eh. I had been working for IBM for, umm, seven years at the time.
I had some small bit of insider information about the PC some
time before 8/81. Several friends disappeared to Boca a couple
of years earlier.
The mode the ISA used was simply stupid (interrupts aren't the
only stupid transgression of the ISA bus).
When doing my mainframe thing (years before the PC), I
architected a similar, but simpler bus that was used for power
controls in mainframes. I had the exact same issues to worry
about so designed my interrupts to be level sensitive (the
priority was far more complicated though). I went from there to
a group doing Intel chipsets.
I repeat: What a hunk-o-junk! I'll repeat: the ISA designers had
no understanding of TTL. They were ECL designers, and it shows.