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NNTP-Posting-Date: Tue, 08 Oct 2002 01:46:07 CDT
From: "Dave VanHorn"
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Subject: Re: Basic Stamp vs Pic processors
Date: Tue, 8 Oct 2002 01:46:06 -0500
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> Interesting. I don't think we can change cores. Too much effort involved
> since I know our on chip bus structure would have to change. That's
> messy and I really don't want to go back to scratch debug again on this
> chip. That took weeks the first time out. BTW, my "master" to "slave"
> communication is quite easy given all of the dual port RAM.
I almost went that way, but couldn't find a DPR that I liked.
> The reason I have three AVRs is a performance issue. The AVR, even at
> 40MHz clock is too slow. Even three AVRs are too slow. To make three
> work, we put in a special arithmetic unit that all three share. That put
> 2 of the AVRs at a constant 80% utilization and I think the master runs
> around 50% - it is hard to measure because the load changes a lot.
Interesting. What are you doing that's sucking up 100 AVR mips?
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