From: "Christopher R. Carlen"
Subject: Re: My flyback experiment is on the web
Date: Tue, 15 Oct 2002 07:59:44 -0700
Organization: Sandia National Laboratories, Albuquerque, NM USA
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NNTP-Posting-Date: Tue, 15 Oct 2002 14:58:40 +0000 (UTC)
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Don Pearce wrote:
> I suspect they are layout-related. This method of breadboarding is
> rather beyond its applicability in high speed circuits like this. Nice
> short leads tied down to a ground plane are the order of the day. The
> tiniest amount of common inductance in the ground would produce these
> spikes. If the simulator says they shouldn't happen, then almost
> certainly this is the cause.
> Telecommunications consultant
Nope. See Fred Bartoli's response, he's right on the money and
explained it very nicely. While the breadboard is not ideal here, it
isn't that bad as we're only switching at 50kHz. It adds some ugliness
to the waveforms in general, but my intuition suggests that the energies
involved in any layout parasitics are a tiny fraction of the energies
involved in the ideal circuit. As an example, I can clamp my fingers
onto the FET heatsink, adding an additional few tens or maybe 100pF to
the drain circuit. This lowers the output voltage by a few volts (about
1%), and lowers the ring-down frequency a little bit. Thus, I suspect
that I may gain 1-2% improvement in circuit performance when
implementing on a PCB properly, but for getting the thing designed, this
seems to be a reasonable approach.
The ringing in question is something that is seen in the simulator,
which if it wasn't, I'd throw out the simulator, because the theoretical
analysis of the circuit clearly indicates that this ring should occur.
I don't intend to let a simulator tell me what a circuit should do.
Christopher R. Carlen
Principal Laser/Optical Technologist
Sandia National Laboratories CA USA