The Cyber-Spy.Com Usenet Archive Feeds Directly
From The Open And Publicly Available Newsgroup
This Group And Thousands Of Others Are Available
On Most IS NNTP News Servers On Port 119.
Cyber-Spy.Com Is NOT Responsible For Any Topic,
Opinions Or Content Posted To This Or Any Other
Newsgroup. This Web Archive Of The Newsgroup And
Posts Are For Informational Purposes Only.
From: John Larkin
Subject: Re: DSP 2's complement vs straight binary
Date: Thu, 17 Oct 2002 18:41:00 -0700
Organization: Posted via Supernews, http://www.supernews.com
X-Newsreader: Forte Agent 1.91/32.564
On Fri, 18 Oct 2002 01:08:36 GMT, "Thomas Magma"
>I am involved in a project where we sub-sample the IF, store it to memory
>and then post-process it. We are at the stage of selecting a ADC for the
>project. I have noticed that a lot of the ADC's suitable for this design
>only output straight binary. All of my algorithms to date have used 2's
>complement (signed) values to perform DFT or FFT functions. Processing speed
>is a major concern and we don't have time to convert each binary sample to
>2's complement. Is there an equivalent method of the DFT or FFT that uses
>straight binary? Or does anybody know of a 3V ADC that puts out 2's
>compliment and can sub-sample 10.7mhz at less than 1mhz (pipeline)?
You can't just invert the MSB?
Go Back To The Cyber-Spy.Com
Usenet Web Archive Index Of
The sci.electronics.design Newsgroup