From: Mike Monett
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Subject: Re: Aylward, Engelhardt: Noise in a transient sim?
References: <7FVr9.170534$S32.firstname.lastname@example.org> <7yWr9.170725$S32.email@example.com> <3DB086B8.3078@Spam.Bots> <_5gs9.178003$S32.firstname.lastname@example.org>
Date: Sat, 19 Oct 2002 20:29:20 -0400
NNTP-Posting-Date: Sat, 19 Oct 2002 20:29:19 EDT
Organization: Bell Sympatico
> You want _my_ secrets? In a thread a couple months ago, you wrote, "I'm down
> to measuring less than 1uV in a 7GHz bandwidth, and things are starting to
> get difficult." However good my performance is, you're doing far, far
The sampler has a unique noise-rejection property that allows it to recover
signals buried in noise. See
> Here's the measured jitter performance of the Silicon Labs Si5020, at
> They get 1.5ps RMS jitter, which is in line with my results. Broadcom
> reports 1ps RMS ; their paper also describes how they modeled noise in
> the PLL. The level of performance reported by Broadcom and SiLabs is only
> practically possible when there are no significant external interference
>  Momtaz, et al, "A Fully Integrated SONET OC-48 Transceiver in Standard
> CMOS," IEEE Journal of Solid State Circuits, vol 36, no 12, December, 2001.
> -- Mike --
Mike, how is the jitter measured in the scope photo? What is the input signal?
I'll describe a simple test I use on pll's. The input signal is a constant
stream of low-jitter clocks that last for 255 bits. The 256th bit is variable.
I measure the change in the vco clock as the variable bit moves through its
entire range. At several points in the window, the vco clock shows a small
shift when one of the logic switching transient lines up with something in the
vco signal. This shows the effect of crosstalk in the layout.
Do you have similar problems with crosstalk in an ic? Is that what you mean by
"no significant external interference effects"