The Cyber-Spy.Com Usenet Archive Feeds Directly
From The Open And Publicly Available Newsgroup
This Group And Thousands Of Others Are Available
On Most IS NNTP News Servers On Port 119.
Cyber-Spy.Com Is NOT Responsible For Any Topic,
Opinions Or Content Posted To This Or Any Other
Newsgroup. This Web Archive Of The Newsgroup And
Posts Are For Informational Purposes Only.
From: John Popelish
Organization: This space not available for advertising.
X-Mailer: Mozilla 4.7 [en] (Win98; U)
Subject: Re: Bypass capacitor position
Date: Fri, 25 Oct 2002 15:20:50 GMT
NNTP-Posting-Date: Fri, 25 Oct 2002 11:20:50 EDT
Richard Haendel wrote:
> Everyone knows that bypass capacitors should be as close as possible to an
> ic's power and ground leads. That's easy, of course, in the case of some
> PICS (for example) when power and ground are directly opposite to each other
> and your using an ic socket that has room for a small capacitor.
> But my question is: can the capacitor be as far away as, say, .2" or .4" and
> still be effective (at about 8Mhz)? If the cap can't be equi-distance from
> both leads, should it be closer to positive or ground? Or does it really
> Note that I'm talking about pc boards with through hole devices, not
> breadboads and not smts.
> Richard Haendel
You have gotten some very good answers, but I haven't seen one
detail. The pair of traces to the capacitor will produce a bit of I*R
and L*(di/dt) drop during changes in the chip's current demand. As
far as the stability of the power across the chip, it makes no
difference how the total trace length is divided between the ground
and power sides of the capacitor, so as long as the traces to the
bypass capacitor share no other duties, it doesn't matter whether the
cap is closer to ground or Vcc.
But if those traces are also part of the path to inputs that are tied
low or high, it may make a bit of difference, since many logic
families have a non symmetrical logic threshold. It is very common
for logic low signals to have less noise margin than logic high
signals. So if the cap traces also share duty as default logic
inputs, I try to keep the cap close ot the ground pin, so that there
is minimum voltage developed on the side that has less noise immunity.
Another facet that I try to attend to is always providing many paths
for supply currents across a board to approximate a power and ground
plane even when traces are used. This allows many bypass capacitors
to share the noise absorption load at any one spot, and damps any
resonance modes by dividing the energy in various directions. I have
seen commercial board that used a serpentine distribution plan that
had all sorts of squirrelly symptoms that all disappeared after I
gridded the supply system with a few bits of fine wire. Some
designers are so frightened of the "ground loop" that they think this
approach solves some problem they do not well understand.
Go Back To The Cyber-Spy.Com
Usenet Web Archive Index Of
The sci.electronics.design Newsgroup