The Cyber-Spy.Com Usenet Archive Feeds Directly
From The Open And Publicly Available Newsgroup
This Group And Thousands Of Others Are Available
On Most IS NNTP News Servers On Port 119.
Cyber-Spy.Com Is NOT Responsible For Any Topic,
Opinions Or Content Posted To This Or Any Other
Newsgroup. This Web Archive Of The Newsgroup And
Posts Are For Informational Purposes Only.
From: "Bevan Weiss"
Subject: Re: JAM (TV show game) circuit using 74LS373
X-Newsreader: Microsoft Outlook Express 6.00.2800.1106
Organization: Orcon Internet Ltd
X-Cache: nntpcache 2.3.3 (see http://www.nntpcache.org/)
X-Original-Trace: 26 Oct 2002 22:31:45 +1300, news.orcon.net.nz
Date: Sat, 26 Oct 2002 22:31:43 +1300
NNTP-Posting-Date: Sat, 26 Oct 2002 22:31:46 NZDT
I'm not entirely sure what it is you want...
However I think it's the following.
You have eight input signals (buttons if you will)...
They are normally high, via a pull-up resistor or similar, and when
depressed cause the output to go low. You then want to latch the value of
the eight inputs such that you can tell which 'contestant' pushed the button
I would think that eight flip-flops would work, each flip-flop having as
it's data input a single button, and then the clock signal being derived
from a NAND gate (or AND gate, depending on clock signal triggering) with
inputs as each button and one input as the inverted(or non-inverted for AND
gate) output (for latching) using a resistor to enable pull-up(/down) for a
reset. You would have to delay the clock signals by the setup time of the
flip-flops to ensure stable operation, however this seems to be close to
what you require.
(button1 output) -----+-------------------| D Flip-flop
| |--+--| CLK
(other button inputs) -----| | |
| | |
sorry bout the poor ASCII art...
"Hartono" wrote in message
> I've a problem with my school project. I use 74LS373 in my JAM (Just A
> Minute) circuit [Tv Quiz game].
> - Precondition:
> all of eight input data(D0-D7) for 74LS373 will be high and the enable
> pin will be high, the output control is taken low so the eight
> output(Q0-Q7) will be high.
> -postcondition (after someone press the button first)
> for example, if the first contestant press the button(S1) then the
> input(D0) of 74LS373 will recieve low, while the enable pin is still
> high and the output control is still low this will cause the
> output(Q0) of 74LS373 will follow (D0), now the output of 74LS373 will
> be like this 01111111 these eight output will become the input for
> 74LS30(8 input NAND GATE) so the output of NAND GATE will be high,
> this output will be the input for the first pin of '2 input NAND
> GATE'[i also connect this this pin with resistor series with ground
> (this is needed for suplying low when in precondition so the '2 input
> NAND GATE' output will be high)] while the second pin is taken high
> because connected to '+5v VCC', the output of '2 input NAND GATE' will
> become input for enable pin(74LS373).
> -the problem is: when i need 74LS373 to latch the output when someone
> press the button so when other contestant press the other button the
> output will still not change (01111111), this cannot happen and i
> still don't know where's the problem.
> The Function Table for the 74ls373 is:
> OUTPUT CONTROL(1) ENABLE(11) D OUTPUT
> L H H H
> L H L L
> L L X Q0
> H X X Z
> I will be thankfull for the effort and help Hartono
> I'm sorry if my english is not good enough and sorry because no
> circuit schematic
Go Back To The Cyber-Spy.Com
Usenet Web Archive Index Of
The sci.electronics.design Newsgroup