From: "Roger Hamlett"
References: <6mEv9.1895$I6.email@example.com> <firstname.lastname@example.org>
Subject: Re: RS422 & synchronous transmission
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Date: Fri, 1 Nov 2002 09:54:31 -0000
NNTP-Posting-Date: Fri, 01 Nov 2002 10:03:30 GMT
Organization: ntl News Service
wrote in message
> On Tue, 29 Oct 2002 23:58:41 -0800, "Jeroen" wrote:
> >"Jim Backus" wrote in message
> >> Any serial comms experts out there able to answer this:
> >> I'm thinking about synchronous NRZ data with an accompanying 1 x
> >> clock.
> >> Similarly looking at the receive data, should the space to mark
> >> transition of the clock be spaced half a bit period into each bit?
> >Data needs to be stable before you can clock it into a D-flipflop. So
> >better that the clock comes a bit later than the data, half a bit space
> >would be ok.
> I agree. But what if the data is asynchronous - i.e.. it can stop & start
> any time period - how does one then sync the clock to the data & still get
> half-bit delay between the clock signal & data
That's the point of the 'start bit'. Run a clock at several times the baud
rate. Feed it through a counter, to reach twice the baud rate. Have this
feed a counter corresponding to the word length less half a bit. Hold the
clock, with the counters all at zero, till you see the edge of the start
bit, and then allow counting, till the second counter times out. Now use the
alternate edges on the first counter, to clock the data. How close you are
to the 'centre' of the bit time, will depend on the clock ratio (typically
perhaps 8:1 ot 10:1 is used), and since it is asynchronous to the incoming
data, with an 8:1 clock, you would be taking your reading anywhere from
3/8th the bit time to 5/8th the bit time.