From: Fred Bloggs
User-Agent: Mozilla/5.0 (Windows; U; Win 9x 4.90; en-US; rv:1.0.1) Gecko/20020823 Netscape/7.0
X-Accept-Language: en-us, en
Subject: Re: zero-power toggle circuit; was, how to master electronics
References: <3DC282F0.firstname.lastname@example.org> <3DC2E327.email@example.com> <3DC3B8B8.firstname.lastname@example.org> <3DC3EFA5.email@example.com>
Date: Sun, 03 Nov 2002 01:11:04 GMT
NNTP-Posting-Date: Sat, 02 Nov 2002 17:11:04 PST
Organization: EarthLink Inc. -- http://www.EarthLink.net
Winfield Hill wrote:
> Kevin Aylward wrote...
>>Wafer wrote ...
>>>For instance, if I ask you to come up with a simple circuit that
>>>would toggle power to a load on and off with each press of a
>>>momentary switch, but draw no current in the off state, what
>>>would you do? I would bet that your circuit would be nothing
>>It would be simple, using standard techniques that are known to
>>work. There is no point reinventing the wheel. In this case a
>>cmos JK or T flipflop driving a mos comes to mind.
> I think Wafer has in mind a discrete transistor solution.
> That's always a fun game. Here's my preliminary entry,
> which features the ability to drive a 10 to 20A load and
> should draw under a nA (room-temp FET leakage) when off.
> ,------x-------------x----------x-----(o)---x---- power
> | | 6.8k | | | 7 - 18V
> +| 1uF '--/\/\--, V | __|__
> === 25V | |/ __|__ | |
> | x--| 2n / \ | |
> | _|_ 10k | |\ 4403 /___\ | LOAD
> x---o o---/\/\--x | | | |
> | toggle | | 22k | |_____|
> | '--- | --/\/\---x |
> | 220k | x-----(o) --' to 15A
> '-----/\/\-----------x |
> | |---'
> | ||<--,
> x-----||---+ IRF540 etc
> | |
> | 6.8k |
> '---\/\/---x-----(o)-------- return
> It's assumed the user doesn't push the toggle switch more
> than ~ 1/4 sec, and also waits a few seconds between each
> toggle. One more part can be added it one desires the
> circuit to power up in a defined state.
> [ Wafer says he likes to sit down and start putting parts
> into a breadboard, then see how (if) it works and refine
> the design. I do the same, only placing parts on paper
> in an evolving schematic, "testing" portions of the design
> with some back-of-the-envelope calculations. If it looks
> good, more detailed calculations and/or spice modeling
> should follow. The above design lacks alternate versions
> to consider, and it lacks a detailed analysis step...
> OK, I'm eager to see what Wafer puts up... ]
> - Win
Well- you're still drawing at least 7mW when it's on though, and this is
not available to the load..