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Date: Sun, 03 Nov 2002 19:34:27 +0100
From: Rene Tschaggelar
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Subject: Re: Interface Conversion
I tend to use a buffer rail/rail opamp in between.
This Opamp is supplied with the AVcc & GND
At its input I use a 5.1V Zehner and a positive gain of 1.
Ing.Buero R.Tschaggelar - http://www.ibrtses.com
& commercial newsgroups - http://www.talkto.net
Grahame Kelly wrote:
> I need to convert 0 to 6.2VDC (measurement) on a board that I am
> interfacing a 10 bit ADC too. The max Vin allowable by the
> ADC is AVcc-0.4 volts which means 4.94 on the embedded controller
> I have.
> Could someone suggest a circuit that guarantees the Vin to the ADC
> will not exceed 4.94VDC, ADC Z impedance is maintained at
> 50K and the ADC sensitivity/selectivity over the 0 - 4.90vdc range is
> not inhibited?
> I had considered a opto-isolation circuit by a 4N25 but the linear
> curve is only about 0.6vdc - too small. Also diode clamping the Vin
> to AVcc means that Vin could reach AVcc+0.2VDC - too much.
> FET circuit and others again have too small a linear gate voltage
> range to satisfy sensitivity/selectivity (10 bit ADC measuring 0-4.9v).
> Any assistance greatly appreciated.
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