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From: John Popelish
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Subject: Re: Maximum load capacitance that 4000 family cmos devices can handle.
Date: Wed, 06 Nov 2002 18:25:08 GMT
NNTP-Posting-Date: Wed, 06 Nov 2002 13:25:08 EST
> Hi everyones. Thanks to read
> On the net in many .PDF files, and also in
> mr. Lancaster's CMOS Cookbook...it is said
> that a fanout of 50 gates max is recommended
> to prevent slow transitions. Since each inputs of
> the 4000 family is typically 5 nanofarad and a
> maximum of 50 gates is recommended,i assume then
> that 250pF is the maximum allowable capacitance
> an output can drive. I want to drive a 1500pF
> load (the gate of an n-channel power mosfet). The
> circuit would be rather ON or OFF for long periods
> of times(minutes!) so transition time seems
> irrevelant here.
> What i'm worrying about is the 10mA limit for such
> devices,and i don't want to latch up the IC and then
> destroy it because of too much load capacitance.
> Anyone can tell me if a 1500pF gate-source capacitance
> from a power mosfet transistor is too much for a 4000
> family device...what are the limits? TIA
Driving a high capacitance is a problem only if:
1. The loads have some maximum rise/fall time requirement, like some
flip flop clock inputs do.
2. The frequency and supply voltage are high enough that the
capacitive currents will over heat the output stage.
Output current will not latch the device, unless it is from a source
that is outside the supply rail voltages. Capacitive load currents do
not fall in this category, unless they are driven from a swing on the
far end of the capacitor.
Your only concern might be #2 above, or that the current limits of the
CMOS output do not switch your few as fast as you require. In that
case, you can parallel a few 4049 or 4050 outputs and jack up the
If you can tolerate a slow turn on and turn off and switch at low
frequency, then any 4000 series output will work as long as it
provides the gate voltage you require.
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