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From: "Thomas Magma"
Subject: Re: High speed ADC evaluation
X-Newsreader: Microsoft Outlook Express 5.50.4133.2400
Date: Thu, 07 Nov 2002 06:11:59 GMT
NNTP-Posting-Date: Wed, 06 Nov 2002 23:11:59 MST
Organization: Shaw Residential Internet
Thanks for the response John,
That is what I kind of expected anyways. Our final design is a
post-processing application that has a large FIFO aboard anyways. So you're
probably right...time for a board cut.
The thing that bothers me is that we have been waiting for this eval kit
that is virtually useless to us. Why couldn't TI put out a eval board with
FIFO and processing software? Something useful.
"the DAC will probably be a small contributor to net error". I believe this
to be very true. I am a bit of a newbie on sub-sampling but I think the net
error will be a factor of clock jitter, selected sampling rate, layout, and
processing algorithm. The first two I was hoping to verify with the eval
I guess I just have to rely on theory and spec sheets. The algorithm is up
"John Larkin" wrote in
> On Thu, 07 Nov 2002 03:56:33 GMT, "Thomas Magma"
> >We are doing some ADC development and have selected the Texas Instruments
> >TLV5535, 8 Bit, 35 MSPS ADC Single Channel to suit our needs. We have
> >purchased the eval kit TLV5535EVM to hopefully evaluate some sub-sampling
> >techniques and also evaluate the added noise of the device.
> >It appears that this eval kit is virtually useless because it uses the
> >TLV5535 to convert a signal to digital and then has a DAC to convert it
> >to analog which you can then hook up to a spectrum analyzer and view the
> >spectrum. So you don't know which device is adding noise to the signal.
> >DAC also has an unfiltered output.
> >I haven't spent any time playing with this eval kit yet but it doesn't
> >like I would be able to trust any of the results I get to properly
> >the performance of the TLV5535. And I don't know how this going to effect
> >our ability to evaluate sub-sampling techniques.
> >Anybody have any suggestions or comments?
> Unless you want to make a major project out of it, it's easier to just
> read the datasheet and believe it, design your product, and test the
> prototype. That is probably the fastest route to a working product.
> Your alternate is to build your own 'demo' board (or maybe kluge
> theirs), stash the digital data somehow (logic analyzer? custom fifo
> or something) and import the burst data for numerical analysis.
> With a whole lot of work, you could duplicate the datasheet results.
> I've found most such ADCs to behave at least as well as advertised
> (with an exception or two!) so tend to just design my product and test
> it. The actual product prototype is the best test bench.
> Bit if you're going to do serious undersampling, the DAC will probably
> be a small contributor to net error, so the TI eval board isn't a bad
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