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Reply-To: "Kevin Aylward"
From: "Kevin Aylward"
Subject: Re: Phase locked loops and confusion.
X-Newsreader: Microsoft Outlook Express 6.00.2800.1106
Date: Sat, 23 Nov 2002 07:43:48 -0000
NNTP-Posting-Date: Sat, 23 Nov 2002 07:43:56 GMT
Chuck Simmons wrote:
> PLLs are fairly common and seem fairly simple but I found over the
> past week that confusion abounds and since I have seen this confusion
> before, I wonder if it is common.
> Our digital team (yes, 2 engineers) has a need for a PLL but for
> various reasons, an all digital loop could not be considered and,
> therefore, I was dragged in as resident analog stuff guru. The y
> showed me the loop they were proposing which consisted of digital
> equivalents (pretty exact really) of a phase detector driving up and
> down charge pumps dumping into a capacitor followed by a filter
> followed by the VCO (which is analog). I was asked what the filter
> needed to be and I mumbled that they had two integrators so it should
> probably be a classic lead/lag and proceeded to draw response curves
> on the whiteboard indicating what was needed.
> The next day, I was told that all of the papers they could find on the
> web used a low pass filter. My comment was an unenthusiastic "Oh." I
> was correctly interpreted and a printed article soon appeared on my
> desk. Suddenly I saw the confusion. The proposed loop had a phase
> detector, charge pumps and capacitor which is Kp/s. The article used
> a phase detector that was Kp. So the article loop has Kp*Kf/s while
> the proposed loop has Kp*Kf/s^2. A low pass is perfectly fine for the
> article loop but not workable for the proposed loop.
I don't understand what you are actually illustrating here. What exact
terms are going with what. Where is every "s" term in what block,
SuperSpice, a very affordable Mixed-Mode
Windows Simulator with Schematic Capture,
Waveform Display, FFT's and Filter Design.
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