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From: Tony Williams
Newsgroups: sci.electronics.design
Subject: Re: zero-power toggle circuit; was, how to master electronics
Date: Tue, 26 Nov 2002 08:33:50 +0000 (GMT)
Organization: None
Message-ID: <4b9b58eb41tonyw@ledelec.demon.co.uk>
References: <66hftu8n61qr8h2u6dg0qo9blpgqet859s@4ax.com> <0riktuo44a75tn450bdm13uh8096hko81q@4ax.com> <4b97e4b30btonyw@ledelec.demon.co.uk> <4b986e5dc9tonyw@ledelec.demon.co.uk> <4b98d1b7f4tonyw@ledelec.demon.co.uk> <4b995dda26tonyw@ledelec.demon.co.uk> <4b99752459tonyw@ledelec.demon.co.uk> <4b9994a514tonyw@ledelec.demon.co.uk> <3DDFAF13.1040007@nospam.com> <3DDFF582.3010009@nospam.com> <4b9a1fd2c3tonyw@ledelec.demon.co.uk> <3DE046D4.9010704@nospam.com> <3DE048CA.6070204@nospam.com> <4b9a59c0f6tonyw@ledelec.demon.co.uk> <3DE14490.9040602@nospam.com> <4b9acd2b75tonyw@ledelec.demon.co.uk> <3DE24159.2030006@nospam.com>
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In article <3DE24159.2030006@nospam.com>,
Fred Bloggs wrote:
> That's exactly what happens. As Vdd climbs from 0->2V, the unloaded
> outputs tend to be somewhere in the Vdd/2 region- except the loaded gate
> stays in mV region, so when Vdd finally rises to 2V and everything goes
> digital, the desired state is locked in. A double insurance would be a
> pull-up to Vdd at the output of the feedback inverter-keeping it a few
> mV from Vdd in the analog region. I will try to firm this up with more
> rigor-once I review the CMOS model parameters- try to get some process
> tolerance limits.
4000 CMOS is 3v Vdd(min). AFAIR, at 2.5v it is
already up and working. The outputs are soggy and
not very unusable, but it is logically working ok.
A bistable state defined at 2.5v will probably be
reliably maintained as Vdd increases.
+--------------------------+
| Vdd |
| | \| | \ |
+----|1 >o----+-----|2 >o--+
| /| | | /
| \
| /R
| \
| |
----------+-----+------------0v
A single-R must be able to pull a bistable out
of the wrong state at Vdd= 2.5v, but not pull it
out of the desired state when working at Vdd= 3v.
Quite a tightrope to walk...... compromises may
have to be made, possibly in Vdd(min) being
greater than 3v.
--
Tony Williams.
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