From: Fred Bloggs
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Subject: Re: circuit wanted-SQUARE PULSE GENERATOR
References: <1038144646.265208@athprx02> <firstname.lastname@example.org> <email@example.com>
Date: Wed, 27 Nov 2002 14:35:34 GMT
NNTP-Posting-Date: Wed, 27 Nov 2002 06:35:34 PST
Organization: EarthLink Inc. -- http://www.EarthLink.net
Winfield Hill wrote:
> Tony Williams wrote...
>>Winfield Hill firstname.lastname@example.org wrote:
>>>... internal resistance below 1V, so R4 and C2 provide a
>>>fixed 25us time for thoroughly discharging C each cycle.
>>I'm still trying to see why that 25uS discharge time
>>doesn't result in a 2.5% non-linearity in the control.
>>Knowing you, you have it covered somewhere, but I just
>>can't see where. Must be going thick...........
> No, Tony, you have found me out! It's unavoidably there, a
> [1/(1 + 2.5% Vin/Vmax)] term in the frequency formula. :>)
> The discharge could be shortened to 5 or 10us, but it'd still
> be there. Fixing the issue would require a switched negative
> tracking current sink. And the added complexity (two opamp-
> controlled current sources, two steering diodes) would likely
> force one to abandon the cmos 555 approach entirely, choosing
> instead a opamp triangle integrator / comparator scheme, etc.
> There's another fault to my circuit. The O.P. specified a
> "square wave." If we assume he meant 50% duty cycle, rather
> than simply rectangular logic pulses, the 25us negative-going
> pulses my circuit puts out are not acceptable. On the other
> hand, modifying the circuit with the above-mentioned tracking
> current sink would also solve this issue.
> - Win
You still have the comparator tpd's which approach 1us or more at small
overdrives like 5mV at threshold crossings. Your circuit is basically
open-loop, and, although clever, will not compete with a 4046 wherein
the operator closes the loop with a stable output frequency display. The
tolerance on the threshold resistor divider chain is something like 25%
and your calibration pot can only get at one of two nodes.