The Cyber-Spy.Com Usenet Archive Feeds Directly
From The Open And Publicly Available Newsgroup
This Group And Thousands Of Others Are Available
On Most IS NNTP News Servers On Port 119.
Cyber-Spy.Com Is NOT Responsible For Any Topic,
Opinions Or Content Posted To This Or Any Other
Newsgroup. This Web Archive Of The Newsgroup And
Posts Are For Informational Purposes Only.
From: JHB@jita.nospam.demon.co.uk (Jim Backus)
Subject: Re: Q: Baud rate generation with 22V10
Date: Wed, 27 Nov 2002 20:52:38 +0000 (UTC)
NNTP-Posting-Date: Wed, 27 Nov 2002 20:52:38 +0000 (UTC)
X-Newsreader: ProNews/2 Version 1.50á1/02
On Tue, 26 Nov 2002 21:56:14, Tim Hubberstey wrote:
> Jim Backus wrote:
> > I need an adjustable baud rate generator to generate 1x clocks for
> > synchronous data transmission. Baud rates of 19,200, 38,400 and 64,000
> > are the ones I really need but thought it would be handy to have the
> > full range of standard speeds from 9,600 up to 64,000. It seems that
> > the old baud rate generator chips are no longer made - at least I've
> > not found a manufacturer.
> > Presumably the way to do it now is with a GAL or FPGA? The company I
> > work for uses the 22V10, so using one or more of those would be
> > convenient. I've never used one before so perhaps some of you good
> > folks on this NG could give me some pointers as to how complex it
> > would be, how many flip flops etc are accessible for this sort of
> > application? Are there other devices that would be more suitable?
> > Perhaps a single chip micro would be a better alternative?
> A 22V10 has 10 flip-flops, up to 22 inputs (hence the 22) and up to 10
> outputs (hence the 10), but not simultaneously. They are actually very
> simple devices and a look at a data sheet is where you should start.
> Whether or not one is suitable for your application is going to depend
> on several factors:
> - what input clock frequencies do you have available? Obviously, 10 bits
> gives you a maximum divide ratio of 1024:1 so if your clock is faster
> than 9.8 MHz, 9600 is out of reach.
> - how are you going to select the output rate? If you're supplying
> discrete digital inputs you *may* be OK but but a processor-accessible
> register is way too complex for this part. There are a very limited
> number of logic terms available in a 22V10 and there may not be
> sufficient to support the programability you are looking for.
> CPLDs are a better option if you are looking for more complex features
> as they are cost-competitive with GALs but have a lot more
> functionality. Free tools are available for development. An FPGA is
> unnecessarily complex and costly for this application, unless you can
> pack a lot of other board features into it.
Thanks to everyone for the answers - I've fallen into the trap so many
posters make of not explaining my requirements clearly enough.
The application is to provide external clocks to two sets of equipment
that normally get their clocks from modems. It is purely a test box so
that we can do end to end testing of a system (muggins is the system
engineer). My intention is that the baud rate be set by thumb wheel
switches - therefore no processor interface necessary. So the initial
requirement is for a one off, though a few more might be built if
found to be useful.
Because it is a one off that is likely to be built on stripboard or
similar, any form of high density packaging eg 44 pin QFPs is
inconvenient. A search on the web today found a couple of devices that
look more suitable - the Atmel 750 series, which are an improved 22V10
with more registers, and the Altera Classic 610 series. Both are
available in DIL packages. I think a free design tool is available
from the Altera site so I may go that way.
Any further tips or gotchas?
bona fide replies to jimb(at)jita(dot)demon(dot)co(dot)uk
Go Back To The Cyber-Spy.Com
Usenet Web Archive Index Of
The sci.electronics.design Newsgroup