From: Keith R. Williams
Subject: Re: ASIC design compensation
Date: Sun, 8 Dec 2002 00:21:05 -0500
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In article ,
> Keith R. Williams wrote:
> > In article , Jim-
> > T@analog_innovations.com says...
> >> On Tue, 3 Dec 2002 07:57:12 +0100,
> >> "t" ,
> >> In Newsgroup: sci.electronics.design,
> >> Article: ,
> >> Entitled: "ASIC design compensation",
> >> Wrote the following:
> >>> Hello
> >>> I ran across the salary survey for Electrical Engineers, and it
> >>> states Chip(component) Designers are on the 2nd place right behind
> >>> EDA software. I wonder is it because the majority or the component
> >>> designers live around the high-cost-of -living -area, or they are
> >>> really among top paid EEs?
> >> Can you point us to the survey?
> >> I would suspect that *custom* chip designers are way off the chart
> >> ;-)
> > I doubt it. Perhaps above average, but not "off the chart".
> Er.. You must have missed where Jim informed us that he wrote a check to
> the tax man for something like $300k:-)
No I didn't see that, but...
Hey, I'm not calling the man a liar. I know some fairly well
paid hired-hands. But let's think this though. Let's assume
that he was using the vernacular (wrote a check == paid, rather
than the literal - *wrote* a single check) $300K to the "tax
man". That would mean about a $1M income. Not too bad, indeed!
That's about a $500/hr rate. ...for the entire year. I'm no
less than impressed! OTOH, if he hired other guns to work for
him... Well, I'm still impressed.
For the rest of us working stiffs, *custom* chip designers do
well, but not all *that* well.