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Reply-To: "Jeff Stout"
From: "Jeff Stout"
References: <firstname.lastname@example.org> <email@example.com> <firstname.lastname@example.org>
Subject: Re: UART to I2C convesion
Date: Mon, 9 Dec 2002 21:31:53 -0600
X-Newsreader: Microsoft Outlook Express 5.00.2615.200
The fist IO pin is the clock which goes from the master to
the slave w/o interference. However, depending on which
micro you use, you may need a transistor and a 3rd io pin.
Let me explain.
After transmitting an address and/or data to the slave, the
slave wants to acknowledge the transmission. Well, your
micro could still be transmitting the last bit when the slave tries
to acknowledge the last transmission. See the problem?
Both the master and the slave will be trying to drive the data
line at the same time.
An 8051 is nice in this regards as it has week pull-ups.
A second solution to this problem is have an IO pin (2nd pin)
from the micro drive the gate of a MOSFET (an 2N7000 is good),
with the drain of the MOSFET connected to a pull-up resister.
The pull-up resister is now the data channel connected to the slave's
data port, and a 3rd IO pin on the micro.
The transmitter from the micro will be inverted, but the micro will
receive the data non-inverted.
Another solution I have seen is to just insert a 1K Ohm resistor
between the master and the slave on the data channel. The resistor
will save the drivers on your master and slave when they try to drive
the channel at the same time.
Wouter van Ooijen (www.voti.nl) wrote in message
> >6. Bit bang an I2C interface with a couple (or three) of IO pins and a
> >2N7000 transistor.
> What would you use the 3d I/O and/or the transistor for?
> Wouter van Ooijen
> -- ------------------------------------
> PICmicro chips, programmers, consulting
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