Reply-To: "Kevin Aylward"
From: "Kevin Aylward"
Subject: Re: How to increase PLL order?
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X-Inktomi-Trace: public1-pete2-5-cust33.pete.broadband.ntl.com 1039559049 1168 126.96.36.199 (10 Dec 2002 22:24:09 GMT)
Date: Tue, 10 Dec 2002 22:24:09 -0000
NNTP-Posting-Date: Tue, 10 Dec 2002 22:24:10 GMT
Christopher R. Carlen wrote:
> Kevin Aylward wrote:
>> A frequency/phase detector is a digital logic detector, of which
>> there are various implementations. In contrast to multipliers and
>> ex-or type that lock on at 90 deg for the center frequency only,
>> frequency/phase types always lock exactly in phase (ideally) no
>> mater what the centre frequency is.
> I think that depends on what the transfer function of the VCO is.
No it does not.
> course, we are used to Kvco/s, but for motors things go haywire.
> I am using the Z-state detector from a 4046, and it doesn't produce
> zero phase error with a motor, though it most certainly does with a
> normal VCO.
Then something is amiss, however, what do you mean by the Z detector?
> The reasons are in the control theory, at which I am not yet good
> enough to explain why this happens. But I have observed it
> nonetheless. A crude attempt at my explaining it would go something
> The motor/VCO transfer function is wierd, so that the loop filter
> transfer function is not that of a simple low pass filter with a
> finite high frequency gain. Instead it is a "zero-pole" as I have
> OPed. This filter doesn't integrate. Phase error is thus some
> non-zero constant.
Have you actually read the data sheet?
Phase comparator I, an exclusive OR gate, provides a digital error
signal (phase comp. I Out) and maintains 90° phase shifts at the VCO
center frequency. Between signal input and comparator input (both at 50%
duty cycle), it may lock onto the signal input frequencies that are
close to harmonics of the VCO center frequency.
Phase comparator II is an edge-controlled digital memory network. It
provides a digital error signal (phase comp. II Out) and lock-in signal
(phase pulses) to indicate a locked condition and maintains a 0° phase
shift between signal input and comparator input.
If you use Phase comparator II the loop gain will force the inputs to
have zero phase shift, whatever the frequency.
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