The Cyber-Spy.Com Usenet Archive Feeds Directly
From The Open And Publicly Available Newsgroup
This Group And Thousands Of Others Are Available
On Most IS NNTP News Servers On Port 119.
Cyber-Spy.Com Is NOT Responsible For Any Topic,
Opinions Or Content Posted To This Or Any Other
Newsgroup. This Web Archive Of The Newsgroup And
Posts Are For Informational Purposes Only.
Reply-To: "Kevin Aylward"
From: "Kevin Aylward"
References: <3DF99AEF.80FA3424@NAESPAM.yahoo.com> <%QhK9.firstname.lastname@example.org> <3DFA3DAA.E103628F@NAESPAM.yahoo.com>
Subject: Re: How to increase PLL order?
X-Newsreader: Microsoft Outlook Express 6.00.2800.1106
X-Mimeole: Produced By Microsoft MimeOLE V6.00.2800.1106
X-Inktomi-Trace: public1-pete2-5-cust33.pete.broadband.ntl.com 1039812216 23887 126.96.36.199 (13 Dec 2002 20:43:36 GMT)
Date: Fri, 13 Dec 2002 20:43:30 -0000
NNTP-Posting-Date: Fri, 13 Dec 2002 20:43:37 GMT
> Kevin Aylward wrote:
>> tom wrote:
>>> "Christopher R. Carlen" wrote:
>>>> Kevin Aylward wrote:
>>>>> A frequency/phase detector is a digital logic detector, of which
>>>>> there are various implementations. In contrast to multipliers and
>>>>> ex-or type that lock on at 90 deg for the center frequency only,
>>>>> frequency/phase types always lock exactly in phase (ideally) no
>>>>> mater what the centre frequency is.
>>>> I think that depends on what the transfer function of the VCO is.
>>>> Of course, we are used to Kvco/s, but for motors things go haywire.
>>>> I am using the Z-state detector from a 4046, and it doesn't produce
>>>> zero phase error with a motor, though it most certainly does with a
>>>> normal VCO.
>>>> The reasons are in the control theory, at which I am not yet good
>>>> enough to explain why this happens. But I have observed it
>>>> nonetheless. A crude attempt at my explaining it would go
>>>> something like:
>>>> The motor/VCO transfer function is wierd, so that the loop filter
>>>> transfer function is not that of a simple low pass filter with a
>>>> finite high frequency gain. Instead it is a "zero-pole" as I have
>>>> OPed. This filter doesn't integrate. Phase error is thus some
>>>> non-zero constant.
>>> I have just seen this post and apologise for not reading all the
>>> other posts but many of them. You seem to be adding a phase-lead at
>>> unity gain which is quite common in closed-loop systems. What you
>>> need to do is add a lag at low frequencies so you have a lag-lead
>>> filter - like this
>> Actually, this is one of those rare occasions that you might not
>> really need to add a lag. In most cases one is usually stuck with:
>> "The only guaranteed way to make a small fortune, is to start with a
>> large one, and lose some of it."
>> In most cases (e.g. amplifiers), you don't have any high frequency
>> gain left to bring the system into a 20db/dec roll off at the unity
>> gain point. So what you do is deliberately roll off the gain and
>> then take it back out again. i.e. a lag-lead. However, in a motor
>> control system the response is usually so slow that you can simple
>> add an op-amp with sufficient BW to give a simple lead around the
>> zero x-ing point, without having to throw away gain at low
> Not sure what you mean by throwing away gain at low frequencies.
> Usually with a lag you increase the overall gain of the loop
Nahh... your definition of lag is non standard. A lag is an extra
20db/dec roll off from the existing roll off. It is a pole, which
reduces the gain of the loop.
> maintain the same unity gain crossover frequencies.
But that's not the point of a lag. Its point is to reduce the gain
before the unity gain frequency, so you can increase it back up again at
the unity frequency, as I explained in my paper. It needs to do this
before other poles kick in.
>In text books
> they make great play of reducing gain at low freuencies with a lag
Because its a useful thing to do if you want to stabilise the loop.
> but it is not comparing oranges with
> oranges - for comparison you have to maintain the same bandwidth
> each time you do a modification of the compensator (where possible).
That's simple not the point of the lag. Sure, it would be nice if you
*could* keep the same BW, but the main idea of compensation is to
stabilise the loop, which usually means restricting the BW as a given
> It is always possible to squeeze a lag or integrator (P+i) into a loop
> but at the expense of phase margin of course.
Not at all. The *deliberate* gain roll off of a lag is what *allows*
you, in general, to un roll off the gain near the zero x-ing point. e.g.
just slap a capacitor across a node with a small resistor in series with
it, it will roll off the gain until the resistor kicks in. The resistor
kicking in will *correct* the phase margin. That's its point. Its to
obtain the phase margin that you require.
>That is where bandwidth
> is important
> - you must know the limiting factor on bandwidth.
And this is exactly what I *explicitly* addressed above. You claimed
that one usually used a lag-lead filter, and this, of *course*, rolls of
the gain, i.e. limits the BW. To the contrary, I pointed out that in
slow systems, it is quite possible to have a lead on its own that can
stabilise the loop, with the advantage that it obviously keeps the BW
up, i.e. no lag.
SuperSpice, a very affordable Mixed-Mode
Windows Simulator with Schematic Capture,
Waveform Display, FFT's and Filter Design.
Go Back To The Cyber-Spy.Com
Usenet Web Archive Index Of
The sci.electronics.design Newsgroup