Reply-To: "Kevin Aylward"
From: "Kevin Aylward"
References: <_moK9.2019$X56.firstname.lastname@example.org> <3DFAF9BA.CCA9287C@earthlink.net> <email@example.com> <3DFC6353.47CE4FFF@earthlink.net>
Subject: Re: mitigating charge injection in switched capacitor systems...
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Date: Sun, 15 Dec 2002 13:53:08 -0000
NNTP-Posting-Date: Sun, 15 Dec 2002 13:53:15 GMT
Robert Baer wrote:
> Jim Thompson wrote:
>> On Sat, 14 Dec 2002 09:26:13 GMT,
>> Robert Baer ,
>> In Newsgroup: sci.electronics.design,
>> Article: <3DFAF9BA.CCA9287C@earthlink.net>,
>> Entitled: "Re: mitigating charge injection in switched capacitor
>> Wrote the following:
>>> A "dirty" trick is to use a capacitor (or maybe another fet) driven
>>> with an opposite polarity pulse, to cancel the capacitive divider
>> It's more than a "dirty trick". Dummy FET's are commonly used in
>> monolithic analog switches to accomplish exactly that.
> Yup! Bucket brigade chips do that also.
> I call it a "dirty trick" because not everyone thinks of it,
Cor blimy mate, leave it out. As Jim says, this technique is absolutely
bog standard. Its very well known by *anyone* involved in S/H designs.
Its even in the Analog devices 1991 app note book. I doubt if you will
any app notes on S/H that do not discuss this technique.
> even using matched FETs does not exactly cancel the effect.
Matching is only going to be within maybe 1% to 5%
> Reasonably decent cancelling is possible, but it seems that exact
> canceling, while theoretically possible, in practice it seems
Exact cancelling is not possible, well except at one input voltage. The
issue is that the compensating fet does not have the same signal on it.
The capacitances, i.e. the charge feedthrough, change with applied
voltage, so the devices can never have the same operating conditions.
This is minimised in the integrating S/H because the Cgs node voltages
can be made equal, however the other nodes still cause a small error.
SuperSpice, a very affordable Mixed-Mode
Windows Simulator with Schematic Capture,
Waveform Display, FFT's and Filter Design.