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Subject: Re: How to increase PLL order?
Date: Mon, 16 Dec 2002 09:00:33 +1300
Organization: Attica Communications
References: <3DF99AEF.80FA3424@NAESPAM.yahoo.com> <%QhK9.email@example.com> <3DFA3DAA.E103628F@NAESPAM.yahoo.com> <3DFBF54D.778230B7@NAESPAM.yahoo.com>
NNTP-Posting-Date: Sun, 15 Dec 2002 19:59:57 +0000 (UTC)
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Kevin Aylward wrote:
> tom wrote:
> > Kevin Aylward wrote:
> >> tom wrote:
> >> But that's not the point of a lag. Its point is to reduce the gain
> >> before the unity gain frequency, so you can increase it back up
> >> again at the unity frequency, as I explained in my paper. It needs
> >> to do this before other poles kick in.
> >>> In text books
> >>> they make great play of reducing gain at low freuencies with a lag
> >> Because its a useful thing to do if you want to stabilise the loop.
> >>> but it is not comparing oranges with
> >>> oranges - for comparison you have to maintain the same bandwidth
> >>> each time you do a modification of the compensator (where possible).
> >> That's simple not the point of the lag. Sure, it would be nice if you
> >> *could* keep the same BW, but the main idea of compensation is to
> >> stabilise the loop, which usually means restricting the BW as a given
> >> evil.
> >>> It is always possible to squeeze a lag or integrator (P+i) into a
> >>> loop but at the expense of phase margin of course.
> >> Not at all. The *deliberate* gain roll off of a lag is what *allows*
> >> you, in general, to un roll off the gain near the zero x-ing point.
> >> e.g. just slap a capacitor across a node with a small resistor in
> >> series with it, it will roll off the gain until the resistor kicks
> >> in. The resistor kicking in will *correct* the phase margin. That's
> >> its point. Its to obtain the phase margin that you require.
> >>> That is where bandwidth
> >>> is important
> >>> - you must know the limiting factor on bandwidth.
> >> And this is exactly what I *explicitly* addressed above. You claimed
> >> that one usually used a lag-lead filter, and this, of *course*,
> >> rolls of the gain, i.e. limits the BW. To the contrary, I pointed
> >> out that in slow systems, it is quite possible to have a lead on its
> >> own that can stabilise the loop, with the advantage that it
> >> obviously keeps the BW up, i.e. no lag.
> > I am afraid you have similar ideas to the textbooks! The reason for a
> > lag is to
> > increase the gain at low frequencies ie an integrator over a limited
> > frequency
> > range.
> This discrepancy would appear to be due in part, to differing
> terminologies in amplifier design and control theory, and differing
> goals. Furthermore, there is a misunderstanding of what "low frequency"
> means. It seems that your referring to DC to some lower bound, where as
> reducing frequency in amplifier terms means the frequency response in
> I agree, that you can use a gain roll off to increase the DC to low
> frequency gain. However, this aspect is really secondary to the main
> goal in *amplifier* design. The fundamental point is to stabilise the
> amplifier. To do this one rolls of the gain before any of the millions
> of other HF poles kick in. Rolling it of faster, than taking it back out
> again at the zero x-ing point can achieve this goal. This is simply not
> debatable. Its how it is.
> >You always keep the bandwidth the same othrwise no
> > comparison can be made.
> Conceptually, that's not how its actually perceived. What one has is an
> amplifier, set of with some required gain, and low and behold its
> oscillating. This is the starting state of affairs. One than either
> rolls of the gain to stabilise it, or trie to add a lead, e.g. a
> capacitor across a feedback resister to increase the loop gain.
> >That is how I have always done it - I respect
> > your point of view.For instance in text books they say that a lag
> > reduces the step
> > response time but this is rubbish. It only reduces the response time
> > as they have in fact reduced the bandwidth - pretty obvious.
> A gain roll off will reduce the response, however, your interpretation
> of what a lag does is based on what one can do in a lagged *system*, not
> the lag by itself.
> >So for a
> > lag with a span of 1:10 (20dB attenuation) you need to increase the
> > overall loop gain by 20dB and all is well.A lag increases gain in a
> > limited range of frequencies at low frequencies and this increases
> > disturbance rejection, gives better tracking etc.
> This wording is poor. The lag does not increase the gain in a limited
> region, it *allows* for increased gain at low frequencies if associated
> design measures are taken in the system.
> Consider a system with a basic single pole roll off, and some other
> poles at HF. This roll off has to ensure that the unity gain point is
> achieved prior to the HF poles. If you now add n times roll offs at some
> frequency, after that frequency the gain will roll of much more rapidly.
> This additional roll of is then knocked out around the o-xing point.
> This means that you can increase the low frequency gain from what it was
> and still have it intersect to 0 db point, prior to those other HF
> >The converse is
> > thrue of course when you put a phase lead into a system - you need to
> > lower the gain to maintain the same bandwidth.
> Again, the issue her is one of definitions and starting assumptions. If
> I have an oscillating system as a *given*, then add a zero (a pure lead)
> it can stabilise the system and it don't reduce the BW one iota.
Down to definitions - a zero is strictly not a lead - it needs a pole to
to go with it. Of course if there is a natural roll-off anyway then the
pole arises naturally (or poles).Your application are for amplifiers
on the whole - for control systems a phase advance has a zero and pole
and a lag has a pole and zero. Yes they would reduce and increase gain.
For example consider a phase advance on an op-amp at the inverting input.
A C in series with an R1 and a parallel R2 into the - input with an
R2 on the feedback path.This has a dc gain of unity but a 'high freq' gain
of 1+R1/R2 off the top of my head so the bandwidth would increase with
this active network.Often it is not possible to add passive networks
due to loading considerations but I am sure you are well aware of this.
A lag (with a pole and zero) is just an integrator over a limited freq range
ie -6dB/octave - not often thought as that but nevertheless that is what it
It also performs the exact same function though is less expensive on phase
margin than the pure integrator (or P-I). Also it is not as good as the
from the point of view of step error coefficients or ramp error
I have often used a P-I and a phase lag at low frequencies.This is like a
double integrator over a limited freq range.
As for definitions in general - well a pole is often called a simple lag but
should not be confused in my book with a phase-lag which is a pole-zero
network.Similalry with a zero - a simple lead but not a phase-lead which
is a zero - then pole.Of course then people talk of a pole-zero network
as a lag-lead which confuses matters further!Everything in my book needs to
be band-limited.We cannot have a pure zero in an analogue system on its own
in any case unless you mean a pure diferrentiator which is unpractical.I
suppose if you put a series resistor it isthen ok but it is just an
amplifier for noise.
Also it has a pole at s=0 too.So when you talk about putting in a pure
zero you are relying on the natural properties (ie the generic poles) of the
system to supply the pole to go with it - whats the difference?
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