From: "George R. Gonzalez"
Subject: Re: Urgent: 3.3V CMOS output to 2.8V CMOS input
Date: Mon, 16 Dec 2002 11:54:10 -0600
Organization: University of Minnesota, Twin Cities Campus
X-Newsreader: Microsoft Outlook Express 6.00.2800.1106
You're in luck, partially, as CMOS is quite forgiving.
You could be trying to meld TTL and ECL50K.
The easiest thing, bump the 2.8 VCC to 3.3 if possible.
Otherwise, a simple voltage divider with 4.7K/27K resistors should do the
at least for low frequencies. If this poops out at high freq, put a 2 to
across the 4.7K resistor. You can scale up the resistor values if the
outputs cant drive much current. Even better, return the 27K resistor to a
clean source of 1.65 volts so we are stealing equal amounts of voltage from
both logic levels.
"Sugapes" wrote in message
> Hi all,
> I have to submit a design for a PCB real fast, and I have a problem
> that I really don't have time to think through (no, this is not
> homework! :-).
> I have two digital CMOS circuits, one operating at 3.3V and the other
> operating at 2.8V and I have to interface them together. As any CMOS
> circuit, the 2.8V powered device won't withstand the 3.3V level (as it
> is greater that Vcc + 0.3V).
> What kind of circuit should I use to lower the 3.3V voltage levels of
> several outputs to 2.8V. I can think of several ways to do this with
> basic circuitry, just from the top of my head (with diodes, resistors,
> and so on), but I really want something that is fast enough to handle
> aroud 10 or 20 MHz and doesn't propagate noise all over around... If I
> had time, I would do some simulations, but I'm really in a hurry!
> Please follow through with some components references and ready to
> implement ideas, but a general idea is also fine if I can sort out the
> details fast enough.
> I'm really hopping that someone has already went through this and can
> give me an idea that will work right away (no further iteractions)...
> Thank you and I'm sorry if I look a bit pretentious...