From: email@example.com (carltons)
Subject: Re: Urgent: 3.3V CMOS output to 2.8V CMOS input
User-Agent: NewsWatcher-X 2.2.3b2
NNTP-Posting-Date: Tue, 17 Dec 2002 09:30:37 GMT
Date: Tue, 17 Dec 2002 09:30:37 GMT
In article ,
firstname.lastname@example.org (Sugapes) wrote:
> Hi all,
> I have to submit a design for a PCB real fast, and I have a problem
> that I really don't have time to think through (no, this is not
> homework! :-).
> I have two digital CMOS circuits, one operating at 3.3V and the other
> operating at 2.8V and I have to interface them together. As any CMOS
> circuit, the 2.8V powered device won't withstand the 3.3V level (as it
> is greater that Vcc + 0.3V).
> What kind of circuit should I use to lower the 3.3V voltage levels of
> several outputs to 2.8V. I can think of several ways to do this with
> basic circuitry, just from the top of my head (with diodes, resistors,
> and so on), but I really want something that is fast enough to handle
> aroud 10 or 20 MHz and doesn't propagate noise all over around... If I
> had time, I would do some simulations, but I'm really in a hurry!
> Please follow through with some components references and ready to
> implement ideas, but a general idea is also fine if I can sort out the
> details fast enough.
> I'm really hopping that someone has already went through this and can
> give me an idea that will work right away (no further iteractions)...
> Thank you and I'm sorry if I look a bit pretentious...
You can put a series schottky diode from the 3.3v device to the input to
the 2.8v device, but you need a pull down on the 2.8v device if there is
not one there already. Value of pull down is non-critical, but should be
10K or higher. BTW, schottky would be placed with the arrow toward the
2.8v gate. Also, a silicon diode can be used, but the schottky insures
CMOS level compliance. This trick will work at the higher speeds, but not
very high (as in > 5 Mbits/sec).