From: Jim Thompson
Subject: Re: Urgent: 3.3V CMOS output to 2.8V CMOS input
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Date: Tue, 17 Dec 2002 15:56:39 GMT
NNTP-Posting-Date: Tue, 17 Dec 2002 10:56:39 EST
Organization: Cox Communications
On 17 Dec 2002 04:01:23 -0800,
In Newsgroup: sci.electronics.design,
Entitled: "Re: Urgent: 3.3V CMOS output to 2.8V CMOS input",
Wrote the following:
|"George R. Gonzalez" wrote in message news:...
|> You're in luck, partially, as CMOS is quite forgiving.
|> You could be trying to meld TTL and ECL50K.
|> The easiest thing, bump the 2.8 VCC to 3.3 if possible.
|Not possible! :-(
|The component absolut maximum rating is 3.3V and I don't want to
|operate it near its maximum (expensive component).
|> Otherwise, a simple voltage divider with 4.7K/27K resistors should do the
|> at least for low frequencies. If this poops out at high freq, put a 2 to
|> 10pf capacitor
|> across the 4.7K resistor. You can scale up the resistor values if the
|> outputs cant drive much current. Even better, return the 27K resistor to a
|> clean source of 1.65 volts so we are stealing equal amounts of voltage from
|> both logic levels.
|That could work, but I need a very low resistance because I'm working
|@ 20 MHz or so, and I have an input capacitance of about 7pF (about 70
|ohm for RC = 1% * Tclk)... Maybe 47/270 divisor, but that is
|unacceptable since a very high current is drawn from the chip (several
Use reasonable value resistors so you don't have a current problem.
Then parallel each with capacitance (like you were tuning up your own
'scope probe). Be sure to include the input capacitance of the 2.8V
device in your estimation.
| James E.Thompson, P.E. | mens |
| Analog Innovations, Inc. | et |
| Analog/Mixed-Signal ASIC's and Discrete Systems | manus |
| Phoenix, Arizona Voice:(480)460-2350 | |
| Jim-T@analog_innovations.com Fax:(480)460-2142 | Brass Rat |
| http://www.analog-innovations.com | 1962 |
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