From: "Harry Dellamano"
References: <email@example.com> <3E064DFC.A1D68C83@ieee.org> <3E0682F1.3691620B@ieee.org>
Subject: Re: TI's low-cost 20W "filterless" class-D amplifer IC
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Date: Mon, 23 Dec 2002 04:31:16 GMT
NNTP-Posting-Date: Sun, 22 Dec 2002 23:31:16 EST
"analog" wrote in message
> Winfield Hill, analog, Winfield Hill wrote:
> >>> 20 watts... TI continues to improve the performance of their low-cost
> >>> "filterless" class-D amplifer IC offerings.
> >>> I'm impressed by the new TPA3001, a 20-watt 0.2% distortion (15W 1kHz
> >>> 8-ohms 18V supply), no-heat-sink part in a small 24-pin TSSOP package.
> >>> Only $2.82 qty 1k, but no inventory or samples available just yet.
> >>> http://focus.ti.com/docs/prod/folders/print/tpa3001d1.html
> >>> http://www-s.ti.com/sc/psheets/slos398/slos398.pdf
> >>> http://www-s.ti.com/sc/psheets/slos402/slos402.pdf
> >>> If you're not familiar with it, TI's new "filterless" class D uses a
> >>> novel modulation scheme different from most other class-D amplifiers.
> >>> "The modulation scheme has very little loss in the load without
> >>> a filter because the pulses are very short and the change in
> >>> voltage is Vcc instead of 2Vcc. As the output power increases,
> >>> the pulses widen, making the ripple current larger. Ripple
> >>> current could be filtered with an LC filter for increased
> >>> efficiency, but for most applications the filter is not needed."
> >>> They do suggest a small EMI filter.
> >>> This un-named scheme appears to differ somewhat from TI's Equibit
> >>> "true digital" technology, however Equibit is a term that doesn't
> >>> appear much in TI's new sales literature. Hmm...
> >> They are using a bi-phase switching scheme that doubles the carrier
> >> frequency and adds a very convenient null in switching ripple at 50
> >> percent duty cycle that allows them to get away with minimal filtering
> >> (although in doing so they overlooked a simple, yet much more elegant
> >> filter configuration).
> > I can think of a simple analog way to implement TI's "filterless" PWM
> > modulation, but going beyond that to pure digital methods, involving
> > sigma-delta conversion with noise shaping or whatever is another scene.
> Where TI falls down, in my opinion, is in failing to recognize that
> the bulk of the large switching component appearing at the output at
> quiescence is a common mode voltage. A single, large value, but
> physically small common mode choke could easily block most of this
> potential emi source with its coupled inductance while its leakage
> inductance could simultaneously serve in the place of TI's small emi
> inductors to the normal mode component.
> >> By the way, the bi-phase approach is just the simplest of the general
> >> approach of using n equally spaced phases in a class-d design. Each
> >> additional phase ups the factor by which the carrier frequency is
> >> effective multiplied and adds an additional null point where ripple
> >> goes to zero with duty cycle (in addition to the nulls at 0 and 100
> >> percent, of course). With an even number of phases there always
> >> will be a null in ripple at 50 percent duty cycle.
> > You've got our attention, tell us more.
> What more is there to tell? Imagine that instead of two phases,
> as with their simple bridge topology, TI offered a controller that
> provided eight evenly phase staggered phases, four on each half of
> the bridged output. Since each a decision point for switching one
> of the phases would arrive eight times as often as were the eight
> phases driven synchronously, the effective carrier frequency upon
> which the audio rides would be eight times as high - all without
> incurring eight times the switching losses. Work smarter, not
> harder I always say. (Yes, true, the cost is in complexity and
> drive circuitry, but that is what IC providers like TI are for.)
> As to ripple, with eight phases there would be seven (equal to the
> number of phase minus one) evenly spaced (with respect to duty cycle)
> null points where the phases's ripple currents completely cancel each
> With eight phases, a very reasonable 125kHz switching frequency would
> appear as a much higher 1MHz carrier frequency, allowing an eight
> times higher loop gain at 20kHz. Also, due to the ripple cancellation
> effect, the output inductors could be smaller than otherwise possible.
> This, together with the fact that the inductors are effectively in
> parallel, could allow the class-d amplifier to have as low an output
> inductance as normally appears on a linear design. There is no good
> reason for a class-d amplifier's output to be just as independent of
> loading as is the typical high performance linear amplifier.
> Of course, paralleling phases beyond a the simple bridge design TI is
> using introduces a significant new potential problem. Guesses as to
> what, anybody?
Current sharing in the parallel outputs.