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Subject: Re: 87% All that vector calculus paid off
References: <email@example.com> <3E06A99F.776F9A81@ieee.org>
NNTP-Posting-Date: Mon, 23 Dec 2002 17:31:26 GMT
Organization: AT&T Broadband
Date: Mon, 23 Dec 2002 17:31:26 GMT
Christopher R. Carlen, analog wrote:
>> This effect has been reported in the literature, and, yes, it can
>> seriously disturb the control to output transfer function, such that
>> the error amp will dither erratically up and down between the two
>> nearest steps. Not to worry, though, there are several possible fixes.
>> The ringing occurs as 1/2*C*V^2 energy sloshes back and forth between
>> the turned-off FET drain, diode, and other stray capacitances and the
>> inductor. As it rings down it is all dissipated uselessly anyway, so
>> why not dampen out the ringing and avoid the "stair steps" altogether?
>> The simplest way to do this is to add a series RC network between the
>> FET drain and ground. The capacitance should be about three times the
>> average capacitance on the drain node (it varies with voltage - check
>> the data sheets for the FET and diode) and the resistor should be about
>> the sqrt(L/C) where L is the value of your boost inductor and C is the
>> drain node capacitance. From your scope images, unless I'm misreading
>> the time base, it looks like the ringing frequency is about 1.6MHz.
>> If you know the value of your inductor at this frequency you can use
>> it and the resonant frequency to calculate the unknown node capacitance.
> I was hoping to avoid a snubber, but I will try it and see how much it
> decreased efficiency. I also wonder how this connects to the decision
> making process about whether to use a "transformer" instead of just an
Very astute. It has a lot to due with it.
> What's also strange is that I noticed on a previous experiment (the one
> on my web site) with a not quite right inductor, the slope of the output
> voltage vs. duty cycle was slightly stepped, but the effect was very
> subtle and more importantly, while tuning the duty% I could smoothly
> walk the cutoff point of the last ring cycle through any part of the
> cycle, but with the present setup, the effect is almost "quantized", and
> there is almost *no* change in output voltage, until the last ring cycle
> either appears or disappears suddenly, then the voltage changes a very
> large amount.
> I'd love to sit down and figure all this out someday in depth, but I
> think for the short term, I'm just looking for a fix.
You needn't look too deep. The flat spots in the transfer function
occur because the control is attempting to turn on the switch when
current is flowing backwards through the inductor, either through the
capacitance or the body diode of the MOSFET. Think about it, during
these periods the switch is already partially or fully "on" so the
arrival of the drive signal to the FET gate has little or no effect
on the drain voltage.
By the way, with carefully measurement, you should also notice that
efficiency wobbles up and down over duty cycle, too.
>> This approach *will* work, but it adds to the f*C*V^2 losses, thus
>> reducing efficiency somewhat. If you are willing to live with a
>> variable operating frequency, you can actually avoid ringing
>> altogether and *increase* efficiency. Interested?
> Yes, please explain. Tony suggested a "constant inductor peak current"
> method. Is this what your thinking too?
Nope. I was thinking of peak current control with a (nearly) constant
off time to let the drain voltage ring down to and *be*at*zero* when the
switch is turned on again. This method of control yields nearly lossless
switching (there are no f*C*V^2 losses) and avoids the source of stair
When the load is light, the peak current commanded by the error amplifier
will be small, and the ramp up time to achieve that peak will be quick.
Thus, frequency will be highest at light load (but it will never exceed
the natural ringing frequency, obviously). There are some ICs out there
that are designed for this mode of operation, or standard ones, like the
TC3842, can be made to work this way with a little helper circuitry.
> Thanks for the input.
Thanks for the interesting problem.
> Good day.
Yes, each day with something new to learn or an some interesting puzzle
to solve usually is. -- analog