The Cyber-Spy.Com Usenet Archive Feeds Directly
From The Open And Publicly Available Newsgroup
This Group And Thousands Of Others Are Available
On Most IS NNTP News Servers On Port 119.
Cyber-Spy.Com Is NOT Responsible For Any Topic,
Opinions Or Content Posted To This Or Any Other
Newsgroup. This Web Archive Of The Newsgroup And
Posts Are For Informational Purposes Only.
From: "Harry Dellamano"
References: <email@example.com> <3E06A99F.776F9A81@ieee.org> <3E07486E.424879B1@ieee.org>
Subject: Re: 87% All that vector calculus paid off
X-Newsreader: Microsoft Outlook Express 6.00.2720.3000
Date: Tue, 24 Dec 2002 17:47:49 GMT
NNTP-Posting-Date: Tue, 24 Dec 2002 12:47:49 EST
"analog" wrote in message
> Nope. I was thinking of peak current control with a (nearly) constant
> off time to let the drain voltage ring down to and *be*at*zero* when the
> switch is turned on again. This method of control yields nearly lossless
> switching (there are no f*C*V^2 losses) and avoids the source of stair
> stepping altogether.
> When the load is light, the peak current commanded by the error amplifier
> will be small, and the ramp up time to achieve that peak will be quick.
> Thus, frequency will be highest at light load (but it will never exceed
> the natural ringing frequency, obviously). There are some ICs out there
> that are designed for this mode of operation, or standard ones, like the
> TC3842, can be made to work this way with a little helper circuitry.
> > Thanks for the input.
> Thanks for the interesting problem.
> > Good day.
> Yes, each day with something new to learn or an some interesting puzzle
> to solve usually is. -- analog
Analog, I mentioned to Chris in an earlier thread that it should be done
with ZVS (Zero Voltage Switching) for better efficiency, no right side
pole, lower EMI and just pretty pictures. The TC384N series is a way to go.
Basically it is peak current control with constant off time. I bet I can
design it with less components than you, maybe. If you show me yours I will
show you mine.
But the first thing I would do is trash that plug board. No good for high
speed power. Each high current loop must be reduced and controlled maybe
with a small ground plane for the control section. I tend to use Vector
board with pins to hold the critical nodes. The control section can be
wirewrapped if you are careful. Know your high dV/dT and dI/dT nodes. Also
50KHz is awfully slow, >100KHz may be better.
Go Back To The Cyber-Spy.Com
Usenet Web Archive Index Of
The sci.electronics.design Newsgroup