From: Chris Carlen
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Subject: Re: 87% ... Design requirements are here
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Date: Sat, 28 Dec 2002 01:30:30 GMT
NNTP-Posting-Date: Fri, 27 Dec 2002 17:30:30 PST
Organization: EarthLink Inc. -- http://www.EarthLink.net
Tony Williams wrote:
> I was being lazy..... because I already know that you
> have a FET that can withstand 400V. A previous thread
> some months ago suggested a FET clamping diode into
> a cap for this purpose. This would limit V-FET to
> 120V (see below).
Yeah, the problem with my FET is 1 ohm on resistance, which hasn't been
too much of a problem, since I have been driving the gate hard and
probably getting much lower than that. But when the system is running
from an input voltage closer to the 11V that I am shooting for, it could
lead to a substantial increase in losses.
>>Also, it would seem that the plain inductor approach has
>>lower winding capacitance (or does it, you probably know better than
>>me), so that less energy would be left over to ring after most had been
>>dumped through the diode into the output capacitor, leading to slightly
> I stuck my neck out from this direction.........
> At Vin=10V and Vout= 350V the duty cycle would
> be 35:1, and/or T-flyback would be about 340ns,
> which I thought was too short. So I set T-flyback
> at 1uS minimum, and the rest followed (sort of)....
Also, you have brought up a very important factor, and that is the
flyback time, which indeed must become much shorter in the plain boost
You see I have not yet attempted to make 350V from the 11V input. I am
currently working through my own design flows on how to reengineer the
system to do the job from 11V input, and am leaning toward a cheap 100V
FET with 0.2ohm on resistance IRFI520N, and using a 6.5:1 flyback
transformer, which will limit the drain to <100V even in the presence of
a 25% leakage spike above the reflected flyback voltage plus the maximum
specified Vcc of 25V.
I have calculated that the primary should be 8.4uH to run at 150kHz.
Max on-time would be 3.34us to give a 10% dead-time even in the case of
minimum input voltage (11V) and minimum output voltage (90V).
> We know from your 1.8A/100uH measurements that the inductor
> can charge/discharge 162uJ per with acceptable efficiency.
> For 12W that means not less than 75000 charges plus
> discharges per second.
> At Vin=10V and Pout=12W there is no dead time.
> This is an important design end-point.
> The 75KHz cycle time (13.3us) is totally consumed
> by (T-On and T-flyback). ie, 13.3 = (12.3 + 1) uS.
> That's an On duty-cycle of 0.92.
> Assume that at 10V the current-shunt and IR stray
> drops add up to 0.5V loss at I-peak, or 0.25V mean.
> At 12W and 9.75V, I-in = 1.23A Avg.
> 2*1.23/0.92 gives I-pk = 2.67A (2.7A).
> Lp = 9.75V*12.3uS/2.7A = 44.4uH.
> At the end-point, Vin*T-On = V-flyback*T-Off.
> Vin*T-On is fixed at L*I-pk, and T-Off= 1uS.
> This gives V-flyback = 120V for a single 44uH winding.
> For 350V an extra 1.9x winding is req'd in series.
> Note that the flyback is a const-I output, so at 90V
> T-off automatically adjusts to about 4uS and the
> feedback reduces the frequency as required.
Your design flow is very interesting, and I will save it for further
study. I am adapting my own procedure from Pressman, but with my own
ideas factored in. I hope to explain it all someday later.
But what is interesting me now, is the idea of zero voltage switching,
or constant off time switching (variable frequency with off time tuned
to put the switch-on moment at the zero voltage point of the ring down
period with inductor current flowing in the optimum direction). It
seems that for a variable output voltage and variable load supply, that
constant off time can't work, because the flyback time is uncertain.
Thus it would seem necessary to implement a circuit that implements
dynamic zero voltage switching, always turning the FET back on at the
first zero voltage after the flyback.
But then there is the question, which zero voltage point is the right
one? I am currently trying to figure that out on paper. I can't do an
experiment right now because I broke my TL3842 chip, and have to fix my
circuit before I can do anything. Maybe I can try a few runs tomorrow.
Do you see what I mean? Should you turn on when the drain hits zero
after the flyback? At that point the inductor current is maximum in the
negative direction. Or should you do it after the first 3/4 cycles of
the ring, when the body diode has just turned off, the drain passes
through zero again in the positive direction, and the inductor current
is heading in the same direction that we want.
It would seem that the first zero is the best point, since then you can
capture all the left over energy stored after the flyback in the winding
and drain capacitances, now stored in inductor current (the first
quarter cycle of the ring down transfered it to the inductor), and
simply add whatever new energy is needed to bring the inductor up to its
Trouble is, the current in the inductor is flowing in the wrong
direction, so it will have to pass through a current zero before we can
add energy to it. That means it will dissipate power in the body diode
anyway and transfer the rest of its energy to the drain and winding
This phenomenon of the ring down with clamping action in a flyback is
very intriguing and complicated. What really puzzles me is that since
the voltage get's clamped at about -0.6V from the body diode, how can
there be enough energy left after the first clamp for the ring to reach
almost up to the output voltage on the second positive excursion, which
indeed it does?
It seems it can be partly explained by the highly non-linear capacitance
of the drain, which is maximum when the drain voltage is low (is that
right?). But what happens to the drain cap. at negative drain voltage?
Is there charge storage in the body diode that accounts for some of it
I am eager to hear where you would choose to do the switch on, in a
"zero voltage" switching scheme, and do you agree that this would be the
best topology? Your circuit would be a "constant inductor energy"
scheme, right? But what do you forsee of the following problem:
You realize of course, that the motivation for the zero voltage
switching scheme is to solve the problem of transfer function
non-linearity that occurs when the flyback is simply allowed to ring, in
a constant frequency topology. Then, the output power vs. duty cycle
transfer function is a stair case instead of linear, due to the effect
of turning the FET back on at different points in the ring down.
This effect is extreme in the case of the boost. It seems to be
mitigated somewhat if there is a flyback transformer, though I am not
very sure why (probably due to lower impedances in the drain circuit?).
I vaguely recall this to be true when I did the experiments on my web
site. The effect was present, but not extreme. With my current setup,
it is extreme. I mean, the output voltage barely changes at all with
changing duty, then suddenly undergoes almost a step discontinuity, to
another output voltage/power, then the process repeats as I turn the
duty cycle pot.
I will see what effect the 6.5:1 transformer has on this problem. It
might smooth it out enough that a control loop could function, but it
would probably have to operate with reduced bandwidth.
Any light you can shed on this topic would be read with great interest.
I hope "analog" and Harry can chime in a bit as well.
It seems there are no off the shelf components to implement this sort of
thing. One of them mentioned being able to do it with a quad comparator
(and probably an op-amp too).
> Stick a 2A fuse in series with Vin?
Yeah, that would work.
Christopher R. Carlen
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