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From: Chris Carlen
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Subject: Re: 87% ... Design requirements are here
References: <firstname.lastname@example.org> <3E06A99F.776F9A81@ieee.org> <3E07486E.424879B1@ieee.org> <951O9.102279$4W1.email@example.com> <3E0A3631.4A5C4AC5@ieee.org> <firstname.lastname@example.org> <email@example.com> <%Y8P9.4404$Ab.firstname.lastname@example.org>
Date: Sat, 28 Dec 2002 22:02:40 GMT
NNTP-Posting-Date: Sat, 28 Dec 2002 14:02:40 PST
Organization: EarthLink Inc. -- http://www.EarthLink.net
Harry Dellamano wrote:
> Chris, you're scary, how long have you thought of Zero Voltage Switching? I
> stated that IMHO you were four levels behind Analog but you have jumped two
> in the last few days. I have thought of ZVS for maybe 15 years but I am
Harry, I only understand some of the conceptual motivations for ZVS, as
based on my own observations of the variation in efficiency that occurs
depending on when the FET is turned back on in the ring down period, and
the effect on the linearity of the duty->output power transfer.
What I have little clue about is how to implement such a thing. I am
just beginning to understand the implementation of current mode
conversion. I may try to hack out an attempt at implementing ZVS on
paper, just for something to do while travelling, but it will probably
look very silly an un-elegant compared to what I'm sure will be produced
by you pros.
So I certainly need your help in that regard. I am becoming confident
in my ability to handle the basic power train design, barring subtleties
like dealing with proximity losses. But even core loss and AC I2R loss
is within my grasp, thanks to the EM course.
But what really impresses me about good engineers is the clever circuits
they create to implement stuff. So I will be very eager to see what you
come up with if you really want to go ahead with it. If you draw, I
will wire and test, and of course raise lots of thorny questions as well ;-)
> You requirement of short circuit proof requires a secondary and drives the
> circuit topology. Your simple Buck Converter will not meet this requirement.
Yes, secondary is needed, with no primary leakage capture diode like
Tony displayed, a really cool thing, but can't use it here. I think you
mean "boost converter" right?
> You said a lot on ZVS and most is correct. When the voltage flies back and
> turns on the FET's parasitic diode it is important to turn on the FET
> channel ASAP for best efficiency. This must be done on the first crossing,
> maybe within 400ns.
I will be interested to plot efficiency vs. time into the ring down
period, to see how this works in more detail. Don't worry about
explaining it too much, it won't stop me from my academic attitude about
things like this. I just love to do experiments.
> I really can't report on too much because I have your design to do and
> Analog will probably kick my butt anyway. He has not said too much and I
> want to see his design so I can learn something. Maybe he is not interested.
We'll see about "analog". Who is that person anyway? Would be nice to
have a few different circuits to choose from so I hope he/she does
continue to comment.
> As far as "off the shelf components" it is really easy to do and you will
> understand when you see it. The only reason you would not do it this way is
> if the user states "fixed frequency" because certain harmonics may interfere
> with other processing he may be doing. Also if you have multi channels that
> have to current share equally.
Umm, interesting considerations I hadn't thought about.
I guess this is it, I will leave tomorrow. So you'll hear from me when
I get back.
Take care all.
Christopher R. Carlen
Suse 8.1 Linux 2.4.19
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