Subject: Re: SwCADIII
Date: Sun, 5 Jan 2003 00:44:42 +0100
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Thank you for the fast reply.
> > - Sometimes the starting voltage of a capacitor seems to be 0, sometimes
> It happens often that especially large circuits make problems with
> Sometimes the circuit itself is wrong. You could send me your circuit to
> take a look at it.
Thank you. I am trying to find a simple and clean situation, a twin diagram
with a small modification but with different starting behaviour.
> That happens if the circuit simulation has problems. The time step will
> be reduced automatically to very slow values in this case. If this doesn't
> help, the simulation aborts after a while.
Ones I just modified the Vcc/2 source from 1.5V to 1.501V and it runs
The device was rather simple without tricky loops, so it seemed to be a bug.
I dont know nothing about the SPICE calculations, maybe the opamp models are
the problems... Usually I am using slow, low voltage, low power cmos parts,
like the mcp609.
> It seems there is no model available. Ask the Microchip company for it.
I dropped them an email, and just take additional chance if somebody out
there has it.
Do you use a SPICE program for noise analysis too? A tricky feature could be
very useful: somehow converting the usual frequency domain noise (1/f etc.)
to time domain and make it visible in a transient analysis. It could be more
informative to see it "as on the scope" rather then thinking about the shape
of a frequency domain diagram... And much more fun... :-))) If the
circuit is highly nonlinear, it could be the only useful examination. Is
this feature available in one of those many spice variants?