From: "Jeff Verive"
References: <firstname.lastname@example.org> <email@example.com>
Subject: Re: Help analysing a CMOS ring oscillator
X-Newsreader: Microsoft Outlook Express 6.00.2800.1106
Date: Fri, 10 Jan 2003 16:15:13 -0600
NNTP-Posting-Date: Fri, 10 Jan 2003 16:15:15 CST
"Kevin Aylward" wrote in message
> Jeff Verive wrote:
> > "Kevin Aylward" wrote in message
> > news:TbaT9.983$Fm.firstname.lastname@example.org...
> >> Jeff Verive wrote:
> > Multiply the load capacitance by the gain for the given stage, if you
> > want to get a closer approximation.
> Ho hum.... That's the bloody point. You don't know the gain. The gain
> depends on the load capacitance of the next stage (gm.Xload), the
> capacitance of the next stage depends on the gain of the following
> stage, the gain of that stage depends on the gain of the 1st stage,
> hence you have to solve solve some simultaneous equations to get the
> gain/phase of the loop.
For a first-order approximation, you use DC gain. Then you look at the
input impedance of the next stage, including Miller capacitances, and
calculate AC gain and phase shift.
> But remember that the use of
> > inverting feedback lowers overall gain and hence decreases Miller
> > capacitance.
> This statement makes no sense.
As someone in sales for a SPICE variant product, you really ought to do
without the sarcasm. This was intended to be a hint. From the output drive
perspective, Miller capacitance of the next stage can be reduced if stage
gain is reduced. I wanted to see if the poster would consider limiting gain
to make his life easier (hence my suggestion in the paragraph which
followed). However, I agree that my intent was unclear; I guess the hint
was disguised too well.
> > Stable ring oscillators often include gain limiting
> > stages for this purpose (since open loop gain is highly temperature
> > and voltage dependent).
> Open loop gain is not really important in itself. What matters is how
> stable the phase is at temperature/volts. However, the effective phase
> shift is supply voltage dependant, so you do want to stabilise it.
> > Anyway, you were looking for a simplified lumped Cload.
> I wasn't, the original poster was, and I was explaining that it is not
> trivial to come up with the effective gain in a loop like this. You cant
> easily calculate the miller capacitance, because you don't know the
> gain, because it depends on knowing what the capacitance is in the first
Considering that the original poster had k, W, and L available, he could
easily have calculated static capacitance. The variation of Cgd in the
switching interval makes calculation of a lumped parameter non-trivial. The
capacitance variation can be calculated from the current waveform, or by
looking at current distribution in the device; he knew W, L, and k, and
presumably the gate oxide thickness, so the current distribution could be
integrated over the switching interval to calculate Cgd(min) and Cgd(max).
The latter method is more precise, but the former is easily done by
simulation (and it would have been nice of you to offer to help this chap
with the simulation. Good PR beats bad PR anyday, unless you can afford to
piss off prospective customers with sarcasm).