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From: Mike Monett
X-Mailer: Mozilla 2.02 (Win16; I)
Subject: SMD Cap Test Fixture
Date: Mon, 13 Jan 2003 01:22:47 -0500
NNTP-Posting-Date: Mon, 13 Jan 2003 01:22:16 EST
Organization: Bell Sympatico
I built a simple capacitor tester to measure unmarked SMD chip caps using
a 74AC14 or 74HC14 inverter with a single 1K feedback resistor. The
unknown cap is connected between the inverter input and ground. Two
inverters are tied in parallel to drive a 470 ohm resistor connected to a
BNC connector. A counter measures the frequency or period of the output
The output frequency can be calculated as follows:
C = 1 / (R * Fout * ln((vth * (vcc - vtl)) / (vtl * (vcc - vth))))
Fout = measured frequency
vcc = 6 ; supply voltage
vth = 3.2 ; max hysteresis voltage
vtl = 2.2 ; min hysteresis voltage
Or, a simple lookup table can be used. Here are some measurements from a
typical capacitor kit using a supply voltage of 5.57V and a 74HC14. I
have not had time to do any statistical analysis, but a few spot checks
seem to agree with the calculated frequency quite well.
Cap (pf) MHz
Here are some random electrolytics:
0.47uf 2.86 khz
10uf 127.3 hz
470uf 2.878 hz
I listened to the beat note at 7 MHz and found the frequency was
reasonably stable and surprisingly clean for a multivibrator. Part of the
stability is from the way the hysteresis is generated in these devices.
As the datasheet states:
"The 74AC14 and 74ACT14 have hysteresis between the positive-going
and negative-going input thresholds (typically 1.0V) which is
determined internally by transistor ratios and is essentially
insensitive to temperature and supply voltage variations."
As it stands now, the circuit seems usable to 4 significant digits.
However, I notice that a variable pressure while holding the cap in place
changes the frequency significantly.
Does anyone know of a good method to hold SMD chip caps in place for
testing? They have a variety of shapes and dimensions, and I don't know
of a simple way to make a test fixture that will work.
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