Reply-To: "Kevin Aylward"
From: "Kevin Aylward"
References: <email@example.com> <_MgV9.firstname.lastname@example.org>
Subject: Re: Help analysing a CMOS ring oscillator
X-Newsreader: Microsoft Outlook Express 6.00.2800.1106
Date: Thu, 16 Jan 2003 08:25:25 -0000
NNTP-Posting-Date: Thu, 16 Jan 2003 08:25:28 GMT
Jeff Verive wrote:
> Of course, I understand the relationship between gain-bandwidth
> product and miller capacitance, which the original poster was having
> a hard time modeling.
Because it is a hard thing to model in a gm amplifier.
>No doubt infinite DC gain does little good if
> unity gain is to be had at a crappy low frequency, but one can
> estimate miller capacitance as an input capacitor nearly equal to
> Cf(1-A), where A is the gain of the circuit with the feedback
> reactive element Cf removed
But this does not mean the gain without the *output load* effects of the
>(i.e. the DC gain between gate and drain
> when the feedback [miller] capacitance is removed, not the overall
> amplifier gain).
No you can't in a simple cmos inverter stage!!!!
You have missed a fundamental point of the millor theorem. It *only*
works when the amplifier has a low output impedance such that the gain
is not effected by any load. It *assumes* that A is independent of load,
i.e. a voltage source. This is simply not true for a gm amplifier. It
has a load of its own millor capacitor itelf, and the input impedance of
the next stage. This changes the gain significantly.
Go and do a small signal equivalent analysis before you keep putting
your foot in it.
> BTW, the same approach is used in textbooks by Mauro, Schilling and
> Belove, to name a few.
But not with a *current* output amplifier.
>The original poster could have modeled this
> in many ways in SPICE to determine the effective miller capacitance,
> but did not seem to be willing to do this, despite my urgings.
There is no real point in modelling the miller capacitance. Just model
the whole circuit all at once and be done with it. For starters, the
miller capacitance isn't.
Suppose I have an ideal gm source, with its output connected to its
input, whats its input impedance.? How about 1/gm, irrespective of the
This shows how the input impedance of a gm stage depends crucially on
its load. The problem in a feedback ring, is that it all goes in
circles, making everything all interact with each other. You can't do a
> Instead, he was looking for a lumped-parameter model that would be
> useful as a first-order approximation. In the end, DC gain in a
> simple inverter establishes an upper bound for AC gain (where Cgd is
> the chief contributor to miller capacitance).
But the DC gain, as I have explained many times is not relevant. You
need to accept this fact. The miller gain is given by gm.Z. Where Z some
effective load impedance due to its *own* millor capacitance and the raw
gm of the following stage. It is *not* only due to ro of the mosfets.
> If the source had some
> bypass capacitance, or if bootstrapping, cascode connections, or
> source follower stages are used, AC gain improvements and reductions
> in miller capacitance are relatively easy to accomplish, but we have
> to remember that the original poster was trying to analyze a simple
> CMOS ring oscillator, in which none of these tricks are commonly
You keep using all these electronic terms to impress, yet you don't
appear to actually know how to apply them.
> Kevin's not on the suds, though I'm sure he could have used some by
> now (we all could). For some reason, after some dozens of replies,
> the original poster's intent gets lost, and I try to keep the basic
> problem in mind.
The basic problem isn't. Its actually quite complicated. It took me
several pages of calculations to come up with a correct formula for a
simple 3 stage feedback ring where there was only a millor capacitor and
a gm included in the model. I'll see if I have time to post the details
on my site.
SuperSpice, a very affordable Mixed-Mode
Windows Simulator with Schematic Capture,
Waveform Display, FFT's and Filter Design.