From: Winfield Hill
Subject: Re: frequency to voltage converter
Date: 17 Jan 2003 03:27:53 -0800
Organization: Rowland Institute
References: <email@example.com> <firstname.lastname@example.org>
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Meindert Sprang wrote...
> A different approach was published many years ago in Elektor.
> They used a single CMOS flip-flop, triggered by the signal to
> be measured. In series with the VSS pin and power ground was
> a resistor and capacitor in parallel. They claimed that the
> current draw of the FF was linear with the operating frequency,
> thus creating a frequency dependent voltage over the resistor.
. +5 Vcc Cute Frequency to Voltage Converter
. +----||----, dV
. | R +----->
. '---/\/\---+ Vdd
. ,--|D Q| Vdd = Vcc - f R C Vdd/2
. | | |
. f-in ---|--|> | dV = f R C Vcc/2
. | |___/Q|--, for very small dV
Cute. This is based on the classic formula i = C V f, where
C is a logic circuit's switched capacitance. That's the amount
of circuit capacitance that must be charged and discharged each
cycle. Charge is taken from the supply, q = C V, and shunted
to ground during discharge, completing the current path. The
total current is I = q f, hence the formula above (the reader
is invited to consider the 1/2 term in the output equation).
With only an ordinary CMOS flip flip this current isn't very
high at low frequencies, but one can add a capacitor to the
output of the flip-flop, increasing the current as desired.
Even with the added capacitor, the circuit is still simple and
arguably is becoming even more cute, but sadly both versions
have a serious flaw. In the i = C V f formula, V is the flip-
flop's supply voltage. This means the frequency-measuring
voltage dropped across the R-C in series with the logic supply
reduces the V in our formula, destroying the circuit's linearity.
The larger the output voltage of the cute f > V converter, the
worse this effect. :>(
To solve this problem, one must create a supply voltage that
doesn't change with load, and measure its current load, using
a circuit something like this,
. Linear Frequency to Voltage Converter
. +12 etc. __
. ---+---------------|+ \ A2
. | | \___________ OUT
. +----||----, | /
. | R +----|-_/\ difference
. '---/\/\---+ | amplifier,
. | | INA105, etc.
. __ | gnd
. ,----|+ \ A1 D
. | | >----G Q1 Vout = f R C Vcc/2
. | ,-|-_/ S 2n7000
. | | | Where C includes the
. | '------------+--||-- gnd flip-flop's internal
. | | low-Z FF capacitance.
. | +5 Vcc | bypass
. --+--------|>]----+ Trim R to calibrate.
. __|__ C
. ,--|D Q|--||-- gnd
. | | |
. f-in ---|--|> |
. | |___/Q|--,
In this circuit A1 serves to maintain the flip flop at the
same voltage as the rest of the logic, and a Schottky diode
prevents possible latchup at power turn-on. The flip flop's
power pins are directly bypassed with a capacitor to supply
the potentially-high switching currents during transitions.
The current for the flip flop with its output-enhancing load
capacitor is provided by MOSFET Q1, and is sensed by resistor
R, which can be trimmed to calibrate for the imprecise value
of C and the loading effect of the internal resistors in A2.
Although my circuit should work well, and fixes the serious
problem in Elektor's simple circuit, its complexity prevents
it from being called cute.