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From: "Harry Dellamano"
Subject: Re: Christopher R. Carlen, your ZVS power supply design is ready!
X-Newsreader: Microsoft Outlook Express 6.00.2800.1106
Date: Sat, 18 Jan 2003 16:37:54 GMT
NNTP-Posting-Date: Sat, 18 Jan 2003 11:37:54 EST
"analog" wrote in message
> Hi Chris,
> Hope you enjoyed Thailand and are all set for some serious lab work.
> While you were away I worked out what I hope you find to be an
> interesting zero voltage switching power supply design for your
> amusement. It should provide you with input undervoltage protection,
> output overload and short circuit protection, low emi and high
> efficiency, all using your IRFI520 as the switch, an inexpensive
> LM339 quad comparator as the control IC, a couple of small signal
> PNPs transistors and a handful of diodes, Rs and Cs.
> I have attached a PDF of the schematic to this post and an identical
> post in alt.binaries.schematics.electronic.
> The control scheme is as follows: the output of the voltage error
> amplifier sets the current level to which the flyback transformer
> primary is charged. When this level is reached the main FET switch
> is driven off and the energy stored in the inductance of the flyback
> transformer is allowed to completely discharge through the secondary
> windings into the output capacitors. At this point transformer voltage
> begins its collapse. When zero crossing of a winding voltage is
> detected, MOSFET turn-off drive is removed and gate voltage begins to
> rise gradually. This provides a short, controlled delay to allow
> transformer voltage to continue reversing until it is caught by the
> MOSFET body diode. A fraction of a microsecond later the MOSFET gate
> voltage rises above its turn-on threshold and the next charging cycle
> for the flyback transformer primary begins.
> In the interests of efficiency and noise immunity an analog of primary
> current in the form of an R/C sawtooth is sensed in lieu of the actual
> current. This works well as long as the charging resistor "sees" the
> same voltage as the primary inductance during its charging cycle and
> both the inductor current and sawtooth voltage are reset to zero each
> Output current limiting can be somewhat problematic since simply
> limiting peak primary current causes this type of converter to behave
> as a constant power source for all overloads except deep short circuits.
> Thus, without additional limiting, dragging the output voltage down to
> a half or third of its normal level will cause output current to rise to
> two or three times its starting limit level. This tendency can be
> circumvented by added an additional resistor (R11) such that the primary
> current limit becomes largely proportional to output voltage.
> Needless to say, for this design to function correctly it is absolutely
> key that the transformer be wound properly in a way that maximizes
> coupling and minimizes capacitive effects. I will cover these details
> later after you've had a chance to digest and respond to this post, but
> one of the main requirements will be that the primary and first section
> of the secondary windings be wound hand-in-hand (bifilar).
> Welcome back and good luck. -- analog
Analog, you surprise me. You also have disappeared for the last two weeks
and I thought that you had declined the challenge.
I will get my design polished up an entered before the EBD.
If one of the criteria is most parts used, you're going to kill me.
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