From: "Jeff Verive"
References: <firstname.lastname@example.org> <email@example.com>
Subject: Re: Help analysing a CMOS ring oscillator
X-Newsreader: Microsoft Outlook Express 6.00.2800.1106
Date: Tue, 21 Jan 2003 13:19:07 -0600
NNTP-Posting-Date: Tue, 21 Jan 2003 13:19:07 CST
"Jim Thompson" wrote in message
> I kept waiting for someone to jump in here and point out that the
> oscillation frequency of CMOS ring oscillators is only dependent on
> the device gm/C ratio and not the size of the devices.
Of course, which is to say that gm*Xc is the voltage gain for each stage for
low loading and low source (generator) impedance. The value of C was what
the OP was trying to get a reasonable guess for, and since it appeared he
was doing an IC design analysis, the physical size of the devices has an
impact on the capacitances (gate and substrate). In addition, there is an
RC delay owing to the polysilicon gate resistance and the Cgs + Cmiller of
the loading stage (plus parasitic capacitances, which an IC designer cannot
ignore). We are neglecting inductances, which is okay for a first order
approximation. The OP had k, W, and L as variables, the last two of which
I'm sure you'll find to have a real impact. The real trick is finding an
appropriate value for C, which we have all seemed to agree is most quickly
done via simulation. The estimation C ~= Ciss ~= Cgd(max) has been suggested
by Motorola and Internation Rectifier, though both of these references go so
far as to say that even this approximation does not match simulation or real
world results with much precision (even these guys stick to simulation
instead of trying to specify an equivalent Cmiller. I guess they trust
SPICE with their livelihoods). The gm can be the DC tdevice
transconductance, as we have been using it. My error was in referring to
gaic instead of transconductance. Of course, we all know how forgiving the
'net' is when you slip up.
> I thought this was correct, but had to wait to do a web update to my
> PSpice which didn't like a particular parameterized library that would
> help demonstrate the effect.
> I just did a seven-inverter ring oscillator. I sized the individual
> inverters for mid-supply thresholds, then added a parameter "K" to
> scale the sizes up and down uniformly.
> Varying the parameter "K" as 1, 2, 4, 8, the frequency remained at
> 1.325GHz within a fraction of a percent. (107ps delay per inverter.)
> Keep in mind that this 7-stage ring oscillator has no output loading.
> Adding a buffer will slow the oscillation slightly.
> ...Jim Thompson
> | James E.Thompson, P.E. | mens |
> | Analog Innovations, Inc. | et |
> | Analog/Mixed-Signal ASIC's and Discrete Systems | manus |
> | Phoenix, Arizona Voice:(480)460-2350 | |
> | Jim-T@analog_innovations.com Fax:(480)460-2142 | Brass Rat |
> | http://www.analog-innovations.com | 1962 |
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