From: "Jeff Verive"
References: <firstname.lastname@example.org> <email@example.com>
Subject: Re: Help analysing a CMOS ring oscillator
X-Newsreader: Microsoft Outlook Express 6.00.2800.1106
Date: Tue, 21 Jan 2003 15:45:00 -0600
NNTP-Posting-Date: Tue, 21 Jan 2003 15:45:00 CST
The OP's problem sounded so much like one from a class I took on digital IC
design, and I assumed he was not working with assumptions on uniform oxide
thickness, balanced P-N drive characteristics, etc., but rather had the
theoretical luxury of making all of his devices (and their construction)
independent of all other devices.
There are obviously many ways to compensate for variations that occur in the
real world (lot-lot, wafer-wafer [for a given lot], chip-chip [for a given
wafer - a.k.a. the "corners"], and device-device on the same chip). I'd say
that 1/2 of the problems that are truly attributable to part variations fall
within these categories, with the other 1/2 due to variations among vendors.
Unfortunately, we always seem to be trading one deficit for another. Design
layout and other simulation tools are always "almost there", and designers
are constantly pushing the envelopes of device operation. This is no, per
se, a problem so long as the designer knows the rough distributions (and
causes) for those parameters they are pushing AND if they know the
implications. Too often, these hot-shot designers expect outgoing tests to
catch parts that stray too far from nominal, and nearly as often the problem
shows up at a customer site after some 50,000 units have shipped.
Pray for best case, design for worst case, and be happy with anything
"Jim Thompson" wrote in message
> On Tue, 21 Jan 2003 13:19:07 -0600,
> "Jeff Verive" ,
> In Newsgroup: sci.electronics.design,
> Article: ,
> Entitled: "Re: Help analysing a CMOS ring oscillator",
> Wrote the following:
> |"Jim Thompson" wrote in message
> |> I kept waiting for someone to jump in here and point out that the
> |> oscillation frequency of CMOS ring oscillators is only dependent on
> |> the device gm/C ratio and not the size of the devices.
> |Of course, which is to say that gm*Xc is the voltage gain for each stage
> |low loading and low source (generator) impedance. The value of C was
> |the OP was trying to get a reasonable guess for, and since it appeared he
> |was doing an IC design analysis, the physical size of the devices has an
> |impact on the capacitances (gate and substrate).
> What I should have elaborated on is that the gm/C term is a constant
> for a given process; which is why the oscillation frequency is
> constant independent of device sizing.... increasing gm causes a
> proportionate increase in C.
> I regularly use ring oscillator configurations to qualify processes
> for maximum attainable speed... I'm fond of lots of margin so I like
> operation at no higher than 1/4 of the ring oscillator frequency,
> simulated with the SLOW/HOT process corner ;-)
> ...Jim Thompson
> | James E.Thompson, P.E. | mens |
> | Analog Innovations, Inc. | et |
> | Analog/Mixed-Signal ASIC's and Discrete Systems | manus |
> | Phoenix, Arizona Voice:(480)460-2350 | |
> | Jim-T@analog_innovations.com Fax:(480)460-2142 | Brass Rat |
> | http://www.analog-innovations.com | 1962 |
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