From: Jim Thompson
Subject: Re: Help analysing a CMOS ring oscillator
References: <email@example.com> <firstname.lastname@example.org>
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Date: Tue, 21 Jan 2003 22:02:51 GMT
NNTP-Posting-Date: Tue, 21 Jan 2003 17:02:51 EST
Organization: Cox Communications
On Tue, 21 Jan 2003 15:45:00 -0600,
"Jeff Verive" ,
In Newsgroup: sci.electronics.design,
Entitled: "Re: Help analysing a CMOS ring oscillator",
Wrote the following:
|Unfortunately, we always seem to be trading one deficit for another. Design
|layout and other simulation tools are always "almost there", and designers
|are constantly pushing the envelopes of device operation. This is no, per
|se, a problem so long as the designer knows the rough distributions (and
|causes) for those parameters they are pushing AND if they know the
|implications. Too often, these hot-shot designers expect outgoing tests to
|catch parts that stray too far from nominal, and nearly as often the problem
|shows up at a customer site after some 50,000 units have shipped.
|Pray for best case, design for worst case, and be happy with anything
I'm almost rabid in my insistence on worst-case-based design.
A recent case-in-point, a GPS chip being processed at IBM (Burlington)
was yielding really badly when beta was at the low corner of the
The customer called me and said that they *knew* it wasn't a problem
with my portion of the design, but asked for my assistance in locating
The fault: The digital designers hadn't worse-cased their 1.6 GHz
toggle-flop, which was cycle-skipping at low beta.
| James E.Thompson, P.E. | mens |
| Analog Innovations, Inc. | et |
| Analog/Mixed-Signal ASIC's and Discrete Systems | manus |
| Phoenix, Arizona Voice:(480)460-2350 | |
| Jim-T@analog_innovations.com Fax:(480)460-2142 | Brass Rat |
| http://www.analog-innovations.com | 1962 |
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